PCIe 6.x: Synopsys IP Selected as First Gold System for Compliance Testing

PCI Express (PCIe) — a leading standard for connecting high-speed components and systems — continues to evolve. One of the most recent iterations of the standard (PCIe 6.x) delivers twice the bandwidth and power efficiency of its predecessor (PCIe 5.x), unlocking new possibilities for next-gen data centers, AI clusters, and high-performance computing (HPC) environments.

But real-world deployments require more than top-line specifications.

A validation framework for interoperability, robust compliance testing, and reliable benchmarks must be established before PCIe 6.x — or any interconnect standard — can be broadly adopted.

With the Synopsys PCIe 6.x IP solution recently being named the first official “Gold System” for PCIe 6.x compliance testing, the standard is poised to make the leap from promising innovation to practical foundation for future systems and workloads. The IP solution integrates CPU, PCIe controller, and PHY as a root complex host using our ARC HS Development Kit and HAPS prototyping system.

The Gold System designation is significant on several levels:

  • Industry first. It’s the first time an IP provider has supplied a host platform for verifying PCIe interoperability.
  • Pre-commercial compliance testing. Our IP solution will enable devices to be tested for PCIe 6.x compliance — even before commercial host platforms become available.
  • Trusted industry reference. The industry now has a trusted reference point for 64 GT/s interoperability, helping design teams bring PCIe 6.x products to market faster and with greater confidence.

Demonstrating the industry’s first PCIe 6.0 interoperability using Synopsys IP and Intel test chip

What the Gold System means

In addition to high performance, PCIe has become a cornerstone of modern connectivity because of its rigorous interoperability standards. PCI-SIG maintains a comprehensive compliance program — validating both functionality and interoperability against the latest specifications — to ensure devices from different vendors work seamlessly together. Products that pass are placed on the PCI-SIG Integrators List, which is recognized as the “seal of interoperability” across the industry ecosystem.

Compliance readiness progresses in three phases:

  1. Pre-FYI (Preliminary For Your Information). The test development stage, when compliance specifications are still being refined and validation methodologies are under construction.
  2. FYI. Tests are publicly available, but results do not yet qualify devices for the PCI-SIG Integrators List. This phase allows vendors to begin measuring their designs against emerging standards.
  3. Full compliance. Devices that successfully pass compliance testing earn qualification for the PCI-SIG Integrators List, signaling proven interoperability to the market.

PCIe 6.x is currently in the pre-FYI stage, during which a Gold System provides a trusted reference platform for evaluating compliance (of add-in cards and other devices) with the latest specification. As the first official Gold System for PCIe 6.x, our platform will provide a common, proven baseline for testing all devices at PCIe 6.x compliance workshops.

Not only is our system facilitating test creation and validation long before formal compliance results are recorded, but it is also supporting 64 GT/s PAM4 signaling before commercial host systems are available. 

Why Synopsys was chosen

The Gold System designation is a testament to our technical capabilities and leadership in the standards community. Our complete PCIe 6.x IP solution has the unique advantage of integrating every piece of the puzzle: Controller IP, PHY IP, Security IP, Verification IP, and prototyping system.

We’ve actively contributed to PCI-SIG for more than two decades, including board-level leadership, working group participation, and continuous involvement in compliance workshops. This longstanding relationship has given us deep insight into the standard’s evolution and the needs of the compliance ecosystem.

And whereas most IP vendors focus only on endpoint (add-in card) configurations, we validate our PCIe IP in both endpoint and root port (system) modes. The result is broader interoperability coverage for customers building systems-on-chip (SoCs) with PCIe host functionality.

“As the PCIe 6.4 specification enters the early stages of compliance program development, having a shared reference system is important for the ecosystem to validate interoperability,” said Al Yanes, PCI-SIG President and Chairperson. “With Synopsys providing a Gold System in the pre-FYI phase, the industry has a platform to begin 64 GT/s testing in advance of the official compliance program.”

Benefits to the PCIe ecosystem and customers

For the broader PCIe 6.x ecosystem, our PCIe 6.x IP will accelerate the compliance program by providing a real, functioning host platform for test development and interoperability trials. And when the FYI period begins, it will provide a proven foundation for testing and reduce delays in bringing products to the Integrators List.

For chip designers and system developers looking for pre-verified IP, the advantages are even more direct. Because our IP is being tested against a wide variety of devices, customers face much less risk of interoperability issues once the formal compliance program commences. Customers also benefit from our PCIe IP Prototyping Kits and HAPS prototyping system with pre-integrated Controller and PHY IP. The comprehensive capabilities of our PCIe 6.x solution ultimately drive faster time-to-market, fewer design respins, and reduced engineering costs.

What’s more, we have already demonstrated 64 GT/s interoperability with a range of cutting-edge devices and interconnects:

What comes next?

PCI-SIG expects the PCIe 6.x compliance program’s FYI phase to begin soon, with the first Integrators List entries to appear in 2026. Until then, the industry depends on pre-FYI testing to refine the compliance suite. And, with our Gold System in place, the ecosystem can hit the ground running at the start of the FYI phase.

We’re excited to spur PCIe 6.x development and compliance and look forward to playing a similar role for PCIe 7.x — helping the industry transition smoothly to future generations of this critical standard.

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