PCI Express: Delivering Needed Bandwidth for Open Compute Project
I recently attended the OCP Summit for the first time and I was impressed by the size of this growing event. The San Jose Convention Center was packed with industry experts – all eager to discuss how to move the Open Compute Project (OPC) forward. I had the opportunity to present on how PCI Express® technology is meeting OCP needs for more and more bandwidth, as well as meet with attending press and analysts to discuss trends in I/O technology, form factors and what’s next for the industry as bandwidth demands continue to explode.
The PCIe 4.0 specification – finalized and published in 2017 – is designed to meet these growing bandwidth demands. PCIe 4.0 architecture delivers 16GT/s with scalable performance up to x16 width, delivering 64GB/s. We’ve seen healthy adoption to date from our members and PCI-SIG is currently working on its PCIe 4.0 Compliance Suite and will publish its Integrator’s List later this year.
So what does this mean for OCP?
Related Semiconductor IP
- PCI Express (PCIe) 2.1 Controller
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