Introduction of Precoding in PCIe 6.0
What Is Precoding in PCIe?
With higher speed introduced from PCIe 5.0, high 32.0 GT/s insertion loss target (-36dB) leads to a higher DFE tap ratio which, in turn, may trigger burst errors due to error propagation following a single bit error. Because of a high DFE tap ratio, if a bit flips and the data is a 01010 pattern, then the bit that flipped influences the DFE the wrong way, so it flips the next bit, which then influences the next bit, and so on... the problem corrects if bits did not alternate since the DFE would settle properly. Burst errors can eventually break the CRC detection capability. They can also lead to SKP Ordered Set corruption
Precoding concept is introduced in PCIe 5.0 Spec and defined new precoding logic for 2-bit aligned UI level (PAM4 used in PCIe 6.0). A Receiver may request precoding from its transmitter for operating at data rates of 32.0 GT/s and higher. Precoding, when enabled at a Data Rate, applies to both Flit Mode and Non-Flit Mode at that data rate.
What’s New for Precoding at 64.0 GT/s and Higher Data Rates ?
To read the full article, click here
Related Semiconductor IP
- 1 to 64 Gbps PCI-Express (PCIe) 6.0 and CXL 3.0 PHY
- PCIe 6.0 Integrity and Data Encryption Security Module
- PCIe 6.0 / CXL 3.0 PHY & Controller
- PCIe 6.0 Retimer Controller with CXL Support
- PHY for PCIe 6.0 and CXL
Related Blogs
- Insights Into the Evolutions and Optimizations of PCIe 6.0
- Navigating the Complexity of Address Translation Verification in PCI Express 6.0
- Unraveling the Newly Introduced Segmentation in PCIe 6.0
- PCIE 6.0 vs 5.0 - All you need to know
Latest Blogs
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
- Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power