Verification Panel: It's More Than the Hardware
In the first part of this panel discussion on verifcation, the experts talked about the state of verification technology and the progress that has been made. It concluded by bringing up the subject of software verification. Taking part in this discussion are: Gary Smith, chief analyst with Gary Smith EDA; Paul Martin, senior manager for debug, trace and performance modeling at ARM; Rajeev Ranjan, CTO with Jasper Design Automation; Harry Foster, chief verification scientist at Mentor Graphics; and Varesh Paruthi, senior technical staff member at IBM.
To read the full article, click here
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related Blogs
- Execute Your Hardware Verification Campaign in the Cloud - a Verification Engineer's Perspective
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- Hardware-Assisted Verification: The Real Story Behind Capacity
- Software is from Mars, hardware is from Pluto
Latest Blogs
- Silicon Insurance: Why eFPGA is Cheaper Than a Respin
- One Bit Error is Not Like Another: Understanding Failure Mechanisms in NVM
- Introducing CoreCollective for the next era of open collaboration for the Arm software ecosystem
- Integrating eFPGA for Hybrid Signal Processing Architectures
- eUSB2V2: Trends and Innovations Shaping the Future of Embedded Connectivity