What Does it Take to Migrate from e to UVMe?
September 6, 2012
So you are developing your verification environment in e, and like everyone else, you've been hearing a lot of buzz surrounding UVM (Universal Verification Methodology). Maybe you would also like to give it a try. The first question that pops in your mind is, "What would it take to migrate from e to UVM e?"
Well, this is a bit of a trick question. The short answer is that if you've adopted eRM in the past, migration to UVM e will only take a few minutes. If your environment is not eRM-compliant, it will take you longer.
And now to the details. What exactly is UVM e, in comparison to native e (IEEE 1647), and to eRM? What is in UVM? And what's all the fuss about?
To read the full article, click here
Related Semiconductor IP
- 250nA-88μA Current Reference - X-FAB XT018-0.18μm BCD-on-SOI CMOS
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
Related Blogs
- JESD204 Frame Mapping explained from converter samples to lanes
- Reducing design cycle time for semiconductor startups: The path from MVP to commercial viability
- From vision to reality in RISC-V: Interview with Karel Masarik
- Virtual Platforms from Arm and Partners Available Now to Accelerate and Transform Automotive Development
Latest Blogs
- Ensuring reliability in Advanced IC design
- A Closer Look at proteanTecs Health and Performance Management Solutions Portfolio
- Enabling Memory Choice for Modern AI Systems: Tenstorrent and Rambus Deliver Flexible, Power-Efficient Solutions
- Verification Sanity in Chiplets & Edge AI: Avoid the “Second Design” Trap
- Embedded Security explained: Cryptographic Hash Functions