MIPS' Aptiv: DSP Capabilities Become Pervasive
June 22, 2012
Last month's edition of InsideDSP discussed MIPS' recent three-core Aptiv product family announcement and provided detailed information on the high-end proAptiv offering. This follow-up article will cover the mid-range interAptiv and entry-level microAptiv cores. As with proAptiv, ARM is clearly in MIPS' gunsights with both of these new architectures.
To read the full article, click here
Related Semiconductor IP
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
Related Blogs
- Xilinx Buys AutoESL, Securing High-Level Synthesis Capabilities
- Synopsys' EM5D and EM7D Processor Cores: The ARC Architecture Gains DSP Capabilities
- Case Study: Unlocking the Capabilities of Today's Complex SoCs for Vision
- Synopsys Enhances ARC Processor Core With Superscalar, DSP Capabilities