Case Study: Unlocking the Capabilities of Today's Complex SoCs for Vision

By _Inside DSP

August 31, 2017

As SoCs become more complex and specialized, incorporating numerous and varied processor cores and dedicated accelerators, it has become more and more difficult to program them. This is particularly true of chips targeting vision-based applications. To meet the performance demands and high data rates of vision applications, vendors are designing heterogeneous devices that incorporate different classes of processors—CPUs, DSPs, GPUs, FPGAs, and special-purpose engines. Programming each of these processors traditionally required differing skill sets—engineers working in languages such as C++, Python, and Java for CPUs, for example, may not have the knowledge of C and assembly for programming DSPs, or OpenCL for GPUs, or Verilog or VHDL for programmable logic.

To fully support the functionality of these complex devices, chip vendors are increasingly challenged to provide easy-to-use and efficient tools that enable developers to take advantage of all processing resources on a chip. To be competitive in the growing market for vision-enabled products, vendors must deliver robust and intuitive tools that enable developers to build efficient software easily.

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