DDR/LPDDR 4/3 Combo PHY in TSMC 28HPC Silicon Proven at 2400 Mbps
Back in October we announced the TSMC 28HPC tapeout of our DDR/LPDDR 4/3 Combo PHY. Since then we have made great progress with customers, and our own silicon bring up. Most recently, the combo PHY IP is brought up in our lab and running at 2400 Mbps.
Many price sensitive consumer products continue to leverage 28nm technology for affordable high performance and low power consumption. Originally announced at Memcon 2014, and developed for TSMC 16FF+, this IP has been selected by multiple customers for their mobile and enterprise server/networking applications. Read about how that IP has been demonstrated running at 3200Mbps here.
To read the full article, click here
Related Semiconductor IP
Related Blogs
- Cadence Ports LPDDR4/DDR4 Combo PHY to TSMC 28HPC to Serve Rapid Adoption in Consumer Products
- HiSilicon collaborates with Cadence on DDR4 PHY IP for TSMC 16FF
- See Demonstration Video of PCIe 4.0 PHY IP in TSMC 16FF+
- Synopsys Accelerates Multi-Die System Designs With Successful UCIe PHY IP Tape-Out on TSMC N3E Process
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview