Cadence Memory IP for LPDDR4 Certified in TSMC 16FFC
Last week, Cadence announced the certification of its LPDDR4 IP in TSMC's 16nm automotive process. The opening paragraph of the press release actually says:
"Cadence Design Systems, Inc today announced that the Cadence LPDDR4/4X memory IP subsystem, utilizing the TSMC 16nm FinFET Compact (16FFC) automotive process technology, has achieved ISO 26262 ASIL C certification from SGS-TÜV Saar. The certification confirms that the Cadence IP is complete and ready for use by customers creating advanced systems-on-chip (SoCs) for ADAS and L3/L4 autonomous driving applications."
That's a lot of jargon in a few lines. Let me unpack it.
To read the full article, click here
Related Semiconductor IP
- LPDDR4 multiPHY V2 - UMC 28HPC+18
- LPDDR4 multiPHY V2 - TSMC28HPC+18
- LPDDR4 multiPHY V2 - TSMC16FFC18
- LPDDR4 multiPHY V2 - TSMC12FFC18
- LPDDR4 multiPHY V2 - TSMC 22ULP
Related Blogs
- CXL 3.1: What's Next for CXL-based Memory in the Data Center
- GDDR7: The Ideal Memory Solution in AI Inference
- Flow Control Credit Updates in PCIe 6.1 ECN
- Partial Header Encryption in Integrity and Data Encryption for PCIe
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview