Reviewing the Latest Arm AMBA ACE5-Lite Protocol Specification Updates
In this blog we will review the newest features released as part of the Arm® AMBA® ACE5-Lite protocol, said to improve throughput and meet the low power demands of ever evolving complex multicore SoCs including cache coherency.
Overview
AMBA ACE5-Lite interfaces are used by I/O coherent managers that need to communicate to other fully coherent managers with caches in the system. Typically, AMBA ACE5-Lite interfaces are used alongside Arm AMBA 5 CHI RN-F interfaces as shown below.
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Related Blogs
- Ecosystem Collaboration Drives New AMBA Specification for Chiplets
- Introducing new AMBA 5 CHI protocol enhancements
- New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions
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