New AMBA 5 ACE/AXI Specification: More About Atomic Transactions
As discussed in the previous installment of this blog, a new class of atomic transactions was introduced in the AMBA® 5 ACE/AXI specification to make operations at the remote locations more streamlined and efficient. We have considered an example of AtomicStore transaction with ADD operation and discussed why it was more efficient than relying on the older semaphore-like exclusive operations. In this installment of the blog we will take a broader look at all atomic transactions and review the changes in signaling.
To begin with, there are four (4) atomic transactions:
- AtomicStore
- AtomicLoad
- AtomicSwap
- AtomicCompare
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Related Semiconductor IP
- AMBA 5 CHI Verification IP
- AMBA 5 CHI Verification IP
- AMBA 5 AHB Bus Verification IP
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Related Blogs
- New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions
- New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP
- Why do I need an AMBA 5 CHI Memory Controller?
- Debug of AMBA AXI Outstanding Transactions
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