New AMBA 5 ACE/AXI Specification: More About Atomic Transactions
February 23, 2018
As discussed in the previous installment of this blog, a new class of atomic transactions was introduced in the AMBA® 5 ACE/AXI specification to make operations at the remote locations more streamlined and efficient. We have considered an example of AtomicStore transaction with ADD operation and discussed why it was more efficient than relying on the older semaphore-like exclusive operations. In this installment of the blog we will take a broader look at all atomic transactions and review the changes in signaling.
To begin with, there are four (4) atomic transactions:
- AtomicStore
- AtomicLoad
- AtomicSwap
- AtomicCompare
To read the full article, click here
Related Semiconductor IP
- PCI Express to AMBA 4 AXI/3 AXI Bridge
- PCIe Controller for USB4 supporting up to PCIe 4.0 with AMBA interface
- PCIe 5.0 (Gen5) Standard Controller with AMBA bridge II
- PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
- PCIe 5.0 (Gen5) Premium Controller with AMBA bridge II
Related Blogs
- New AMBA 5 ACE/AXI Specification: Rationale for Atomic Transactions
- New AMBA 5 ACE/AXI Specification and Its Support in Cadence ACE/AXI VIP
- Why do I need an AMBA 5 CHI Memory Controller?
- Debug of AMBA AXI Outstanding Transactions
Latest Blogs
- Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)
- The Industry’s First USB4 Device IP Certification Will Speed Innovation and Edge AI Enablement
- Understanding Extended Metadata in CXL 3.1: What It Means for Your Systems
- 2025 Outlook with Mahesh Tirupattur of Analog Bits
- eUSB2 Version 2 with 4.8Gbps and the Use Cases: A Comprehensive Overview