Are we on the verge of a new ASIC era? DARPA’s Nanowriter and practical e-beam lithography By _EDA360 Insider January 26, 2011
In Verification, Failing to Plan = Planning to Fail By _Cadence - Functional Verification Blog January 14, 2011
Windows On ARM: For Intel (And AMD And Via), Probably No Cause For Alarm By _Brian's Brain January 13, 2011
Applying Digital-Centric Verification Methodologies to Analog By _Cadence - Functional Verification Blog January 13, 2011
IP-SoC trip report (part I): how analyst sees the future of IP (and forecast the past) By SemiWiki January 7, 2011
Can you really value SoCs in dollars per square centimeter? Part Deux By _EDA360 Insider January 4, 2011