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AES IP

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Search (128)
Compare 128 AES IP from 46 vendors (1 - 10)
  • NIST AES Key Wrap/Unwrap Core
    • Small size: AKW1 starts from less than 8,000 ASIC gates
    • Completely self-contained: does not require external memory
    • Supports both encryption (wrap) and decryption (unwrap). Encryption-only and decryption only versions available.
    • Includes AES key expansion
    Block Diagram -- NIST AES Key Wrap/Unwrap Core
  • Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
    • Encrypts using the AES Rijndael Block Cipher Algorithm.
    • Satisfies Federal Information Processing Standard (FIPS) Publication 197 from the US National Institute of Standards and Technology (NIST). FIPS-197 validated (AESAVS).
    • Processes 128-bit data blocks with 8, 16 or 32-bit data interface
    • Employs key sizes of 128 bits (AES128), 192, or 256 bits (AES256)
    Block Diagram -- Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
  • 802.15.3 CCM AES Core
    • Small size: From 9,500 ASIC gates at 802.15.3 data Speeds.
    • High data rate: up to 8 Gbps for IEEE 802.15.3c / ECMA-387 (TC 48) / IEEE 802.11ad 60 GHz PHY
    • Completely self-contained: does not require external memory
    • Includes encryption, decryption, key expansion and data interface
    Block Diagram -- 802.15.3 CCM AES Core
  • 800G/400G/200G/100G AES Encryption Core
    • The 800G/400G/200G/100G AES Encryption Core is a high performance—yet low footprint—AES engine for 800/400/200/100 Gbps applications.
    Block Diagram -- 800G/400G/200G/100G AES Encryption Core
  • 100G AES Encryption Core
    • The 100G AES Encryption Core is a high performance—yet low footprint—AES engine for 100 Gbps applications.
    • Typical applications are providing bulk encryption for 100GE, LO ODUCn and OTU4.
    Block Diagram -- 100G AES Encryption Core
  • 50G/40G/25G/10G AES Encryption Core
    • The 10G/25G/40G/50G AES Encryption Core is a high performance—yet low footprint—AES engine for 10 Gbps to 50 Gbps applications.
    • Typical applications include providing bulk encryption for 25GE, 10GE, OTU3, OTU2 and OTU2e as well as legacy SONET/SDH OC192/STM-64 environments.
    Block Diagram -- 50G/40G/25G/10G AES Encryption Core
  • Sub-2.5G AES Encryption Core
    • The sub-2.5G AES Encryption Core is a special low footprint and low-power implementation of AES engine for application requiring less than 2.5G/s.
    • Because of its tiny footprint and low power, it works exceptionally well in system utilizing Gigabit Ethernet, fiber channel, custom linkage using RSlink/ethernet, GFP, dedicated VPN links, OTU1 and SONET/SDH OC48/12/3 and STM-16/4/1 environment.
    Block Diagram -- Sub-2.5G AES Encryption Core
  • AES core
    • Implemented according to the FIPS 197 documentation.
    • Also available in CBC, CFB and OFB modes.
    • Key size of 128, 192 and 256 bits.
    • Both encryption and decryption supported.
    Block Diagram -- AES core
  • AES-XTS IP core
    • The Helion Fast AES XTS core implements the AES “XEX-based Tweaked Codebook with Ciphertext Stealing” cipher mode (abbreviated to XTS) specified by NIST SP800-38E and in IEEE 1619 to provide Narrow-Block Encryption as part of its Standard for Cryptographic Protection of Data on Block-Oriented Storage Devices.
    • XTS is also specified in IEEE 1619.1 for use in tape storage applications. In addition, some versions optionally implement the AES Cipher Block Chaining (AES-CBC) mode of operation which is sometimes used in legacy storage applications.
    Block Diagram -- AES-XTS IP core
  • G.9961 AES-CCM Frame Encryption Core
    • The Helion G.9961 AES-CCM (“AES-G.hn”) core is designed to sit near the top of the LLC sublayer and provide the security functionality described in Section 9.1 of ITU-T G.9961.
    • The core integrates all of the underlying functions required to implement AES in CCM mode for G.9961 including nonce and header formation, round-key expansion, counter management, block chaining, final block masking, and tag appending and checking features.
    • The only external logic required is to insert the CCMP header field for frames that are to be encrypted.
    Block Diagram -- G.9961 AES-CCM Frame Encryption Core
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