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Clocking IP for TSMC

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Compare 55 Clocking IP for TSMC from 5 vendors (1 - 10)
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  • 3nm
  • Crystal Oscillators
    • The crystal oscillator macros are available in a wide range of industry-standard quartz crystals and MEMS resonators operating in the fundamental mode in the 32 kHz to 80 MHz range.
    • These oscillators, which are both power and area efficient, have a programmable transconductance to allow users to find the optimal balance between jitter and power consumption.
    Block Diagram -- Crystal Oscillators
  • Core Powered Wide Range Programmable Integer PLL on TSMC CLN3P-CLN3X
    • Entirely core voltage powered, needs no analog supply voltage
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    Block Diagram -- Core Powered Wide Range Programmable Integer PLL on TSMC CLN3P-CLN3X
  • Core Powered Wide Range Programmable Integer PLL on TSMC CLN3E
    • Entirely core voltage powered, needs no analog supply voltage
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    Block Diagram -- Core Powered Wide Range Programmable Integer PLL on TSMC CLN3E
  • 18-40MHz Crystal Oscillator on TSMC CLN3P-CLN3X
    • Crystal Oscillator pad macro that supports industry standard crystals
    • Uses standard CMOS transistors
    • Crystal Oscillation Mode: Fundamental
    • Power down option for IDDQ testing
    Block Diagram -- 18-40MHz Crystal Oscillator on TSMC CLN3P-CLN3X
  • General-purpose & Specialized Ring PLLs + RTL-based Solutions
    • Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
    • Input & output frequency ranges greater than 1000:1
    Block Diagram -- General-purpose & Specialized Ring PLLs + RTL-based Solutions
  • Free running oscillators
    • Compact and low power
    • No external components
    • Baseline CMOS logic process masks only
    • Excellent frequency precision over PVT after trimming
    Block Diagram -- Free running oscillators
  • Wide Range Programmable Integer PLL on TSMC CLN3P-CLN3X
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    • Small area footprint
  • Wide Range Programmable Integer PLL on TSMC CLN3E
    • Electrically Programmable PLL for multiple applications
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Implemented with Analog Bits’ proprietary architecture
    • Small area footprint
  • PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3P-CLN3X
    • High performance design emphasis for meeting low jitter requirements in PCIe Gen4 & Gen5 applications
    • Implemented with Analog Bits’ proprietary LC architecture
    • Low power consumption
    • Spread Spectrum Clock Generation (SSCG) and tracking capability
  • PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN3E
    • High performance design emphasis for meeting low jitter requirements in PCIe Gen4 & Gen5 applications
    • Implemented with Analog Bits’ proprietary LC architecture
    • Low power consumption
    • Spread Spectrum Clock Generation (SSCG) and tracking capability
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