Analog IP for GLOBALFOUNDRIES

Compare 71 Analog IP for GLOBALFOUNDRIES from 7 vendors (1 - 10)

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12nm

All Digital Fractional-N RF Frequency Synthesizer PLL in GlobalFoundries 12LPP/14LPP
- Fractional Multiplication with frequencies up to 8GHz
- Extremely low jitter (< 300fs RMS)
- Small size (< 0.05 sq mm)
- Low Power (< 10mW)
All Digital Fractional-N PLL for Performance Computing in GlobalFoundries 12LPP/14LPP
- Fractional multiplication with frequency up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 5mW)
- Support for multi-PLL systems
General Purpose All Digital Fractional-N PLL in GlobalFoundries 12LPP/14LPP
- Low jitter (< 18ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 3.5mW)
- Support for multi-PLL systems
Low Power All Digital Fractional-N PLL in GlobalFoundries 12LPP/14LPP
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
- Reference clock from 5MHz to 200MHz
Low Power All Digital Fractional-N PLL in GlobalFoundries 22FDX
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.01 sq mm), using a ring oscillator
- Output frequency can be from 1 to 200 times the input reference, up to 1.0GHz
FracN/SSCG PLL on GLOBALFOUNDRIES 12LP+
- Electrically Programmable PLL with Fractional-N divider and Spread Spectrum Clock Generation
- Wide Ranges of Input and Output Frequency for diverse clocking needs
- Ability to generate precise system clocks synchronized to track remote sources
- Very fine precision: near 1 part per billion resolution
Sleep Management Subsystem
- Power-On-Reset
- Programmable relaxation oscillator
- Low Power Comparator
Power Management Subsystem
- The agilePMU Subsystem is an efficient and highly integrated Power Management Unit for SoCs/ASICs.
- Featuring a Power-On-Reset (POR), multiple Low Drop-Out (LDO) regulators, and an associated reference generator.
- The agilePMU Subsystem is designed to ensure low power consumption while providing optimal power management capabilities.
Sensor Interface Subsystem
- The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs.
- Featuring multiple Analog-to-Digital Converters (agileADC), Digital-to-Analog Converters (agileDAC), low-power programmable analog comparators (agileCMP_LP), and an associated reference generator (agileREF).
- The agileSensorIF Subsystem enables easy interaction with the analog world.
Low Drop-Out Linear Regulator
- The agileLDO is a linear Low Drop-Out voltage regulator (LDO) providing precision and programmable voltage regulation.
- The regulator architecture provides a high dynamic performance making it suitable for demanding digital applications.
- Whilst the low noise and high PSRR lends itself to powering noise-sensitive analog circuits.