IP for GLOBALFOUNDRIES

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Compare 1,047 IP for GLOBALFOUNDRIES from 58 vendors (1 - 10)
  • 1.8V/3.3V GPIO With I2C Compliant ODIO in GF 55nm
    • This I/O Library, developed on GlobalFoundries 55nm CMOS, delivers a complete suite of digital and analog I/O solutions with robust 2 kV HBM / 500 V CDM ESD protection and latch-up immunity.
    • The library includes 1.8/3.3 V GPIOs supporting GMII and LVCMOS standards, I2C-compliant ODIOs, and flexible analog I/Os (ANA/DANA) with integrated ESD.
    Block Diagram -- 1.8V/3.3V GPIO With I2C Compliant ODIO in GF 55nm
  • ULP Clock Generator - GLOBALFOUNDRIES 22FDX
    • The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
    • High energy efficiency: Only 5 μW are consumed during operation
    • A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
    Block Diagram -- ULP Clock Generator - GLOBALFOUNDRIES 22FDX
  • Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
    • Tightly integrated power management platform with a soft-IP wrapper around Analog / Mixed-Signal hard macros which generate all supply voltages and clock signals needed to run highly efficient SoCs in GlobalFoundries® 22FDX®.
    • Running from only one supply voltage and reference clock, the IP generates its own internal supplies and references, and those needed to run the Racyics® ABX® Generator.
    Block Diagram -- Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
  • ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
    • The All Digital Frequency Locked Loop (ADFLL) architecture is reduced to the minimum amount of hardware necessary to generate a 10 MHz clock
    • High energy efficiency: Only 5 μW are consumed during operation
    • A reference clock divider allows reference clock frequencies from 32 kHz to 1 MHz
    Block Diagram -- ULP 10MHz Clock-Generator - GLOBALFOUNDRIES 22FDX
  • IO Library - GLOBALFOUNDRIES 22FDX
    • Library contains approx. 60 IO cells
    • Support for all metal-stacks of 22FDX®
    • Low voltage cells with nominal core voltages down to 0.4 V for glue-less interfacing to ULV Racyics® ABX digital standard cell domains
    • Low leakage cells for ultra low power always-on domain usage
    Block Diagram -- IO Library - GLOBALFOUNDRIES 22FDX
  • Automotive Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
    • RI_ABB_GF22FDX_AM is an adaptive body bias voltage generator for automotive applications in Globalfoundries 22FDX® technology.
    • It contains a closed loop body bias regulation loop to generate N-well and P-well bias voltages for compensation of process, voltage and temperature (PVT) variations during operation.
    • This results in up to 76% leakage power improvement for automotive grade-1 applications up to 150°C junction temperature.
    Block Diagram -- Automotive Adaptive Body Biasing Generator - GLOBALFOUNDRIES 22FDX
  • Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX
    • RI_ABB_GF22FDX is a cutting-edge adaptive body bias (ABB) generator for GLOBALFOUNDRIES® 22FDX® technology.
    • Featuring patented closed control loops with independent N-well and P-well body bias voltage generation, this silicon-proven IP dynamically compensates for process, voltage, and temperature (PVT) variations during operation.
    Block Diagram -- Adaptive Body Bias Generator - GLOBALFOUNDRIES 22FDX
  • Single Rail SRAM GLOBALFOUNDRIES 22FDX
    • Ultra-low voltage logic designs using adaptive body biasing demand dense SRAM solutions which fully integrate in the ABB aware implementation and sign-off flow of the Racyics® ABX Platform solution.
    • The Racyics® Single Rail SRAM supports ultra-low voltage operation down to 0.55 V where logic designs with Minimum-Energy-Point are implemented.
    Block Diagram -- Single Rail SRAM GLOBALFOUNDRIES 22FDX
  • Dual Rail SRAM Globalfoundries 22FDX
    • Single port SRAM compiler based on P124 bitcell with Dual-supply-rail architecture
    • Bitcell array supply voltage 0.8V and ULV core interface down to 0.4V enabled with Racyics' ABB
    Block Diagram -- Dual Rail SRAM Globalfoundries 22FDX
  • 6-bit, 5 GSPS DAC - GlobalFoundries, 22FDX
    • The D6B5G is ultra-low power, high-speed digital to analog converter (DAC) intellectual property (IP) block.
    • It has a 6-bit resolution, and a sampling speed of 5 gigasamples per second (GSPS).
    Block Diagram -- 6-bit, 5 GSPS DAC - GlobalFoundries, 22FDX
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