SoC processor is set for the big picture
Jeremiah Golston, Texas Instruments Inc.
(04/10/2006 9:00 AM EDT), EE Times
Today's demanding consumer video applications often require the high performance of system-on-chip integration, yet SoC processing engines have created new challenges for system developers. SoCs have traditionally been based on closed architectures, giving developers
few options for implementation; however, video applications ranging from consumer communications to multimedia products are becoming increasingly complex, requiring design flexibility for greater customization and ad- vanced feature updates.
OEMs often need to use the same system platform across a range of products that are tailored for specific markets; or they may need to combine different applications in the same system, such as a security camera with object recognition, or an IPTV set-top box with integrated video phone or digital media adapter capabilities.
As multiple-application products continue to grow in number, system developers increasingly need SoC processors that have been designed with open architectures to meet the versatile, rapidly changing requirements of the consumer video market. Fortunately, a new type of SoC processor has appeared that integrates high performance and programmable cores, together with the essential memory and peripherals for building a wide range of consumer video systems.
The SoC architecture is based on a programmable digital signal processor with video-specific hardware acceleration that provides the computational performance needed for real-time compression-decompression algorithms (codecs) and other communications signal processing. Combining a RISC processor with the DSP adds control and user interface support, together with programming ease; and integrated video peripherals reduce system cost and simplify design.
To read the full article, click here
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- HBM4 Controller IP
- IPSEC AES-256-GCM (Standalone IPsec)
Related Articles
- Top 5 Reasons why CPU is the Best Processor for AI Inference
- How AI is changing the game for high-performance SoC designs
- The network-on-chip interconnect is the SoC
- The SoC design: What’s next for NoCs?
Latest Articles
- ElfCore: A 28nm Neural Processor Enabling Dynamic Structured Sparse Training and Online Self-Supervised Learning with Activity-Dependent Weight Update
- A 14ns-Latency 9Gb/s 0.44mm² 62pJ/b Short-Blocklength LDPC Decoder ASIC in 22FDX
- Pipeline Stage Resolved Timing Characterization of FPGA and ASIC Implementations of a RISC V Processor
- Lyra: A Hardware-Accelerated RISC-V Verification Framework with Generative Model-Based Processor Fuzzing
- Leveraging FPGAs for Homomorphic Matrix-Vector Multiplication in Oblivious Message Retrieval