SoC not high enough on agenda for mass market
SoC not high enough on agenda for mass market
By Anthony Clark, EE Times UK
May 16, 2002 (10:17 a.m. EST)
URL: http://www.eetimes.com/story/OEG20020510S0022
Serious obstacles still face the development of a mass market for system-on-chip (SoC) products. Executives speaking at last week's International Electronics Forum, organised by Future Horizons, pointed to issues covering a broad range of areas from the design to the production of SoC devices. One of the most downbeat assessments of the SoC market came from Sony's chief technology officer. Tsugio Makimoto, also a corporate adviser within the technology group, said: "Design productivity is lagging; costs are escalating, especially for masks; and testing is becoming more complex." At rival Japanese company NEC, Hiro Hashimoto, a senior vice-president, said productivity improvements needed for SoC now depend on advances in process technology and system-level design. He believes that reaching these goals will depend on the industry becoming less guarded over innovations: "We should be more open." Hashimoto wants fab equipment manufacturers and materials and intellectual property (IP) vendors to be placed at the centre of any decisions made to encourage the move to large-scale SoC design and production. He believes platform-based SoC, using pre-designed, silicon-proven IP blocks, will improve time-to-market for some types of potential SoC applications. Pasquale Pistorio, president and CEO of STMicroelectronics and a long-time evangelist for SoC, says the industry needs to concentrate more on production issues. "The necessary manufacturing facilities are only available from a select number of players," he said. He believes this is partly because production is not being given enough support: "Manufacturing is not always given top priority, despite the clear competitive advantage it can provide."
Related Semiconductor IP
- eDP 2.0 Verification IP
- Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
- LLM AI IP Core
- Post-Quantum Digital Signature IP Core
- Compact Embedded RISC-V Processor
Related White Papers
- SoC design: When is a network-on-chip (NoC) not enough?
- Post-Quantum Cryptography: Why Open Source alone is Not Enough for Secure IP Deployment
- How AI is changing the game for high-performance SoC designs
- Analysis: OMAP35x brings Cortex-A8 to the mass market
Latest White Papers
- SPAD: Specialized Prefill and Decode Hardware for Disaggregated LLM Inference
- DRsam: Detection of Fault-Based Microarchitectural Side-Channel Attacks in RISC-V Using Statistical Preprocessing and Association Rule Mining
- ShuffleV: A Microarchitectural Defense Strategy against Electromagnetic Side-Channel Attacks in Microprocessors
- Practical Considerations of LDPC Decoder Design in Communications Systems
- A Direct Memory Access Controller (DMAC) for Irregular Data Transfers on RISC-V Linux Systems