Mission Critical in Auto SoC: Interconnect IP
Kurt Shuler, VP Marketing, Arteris
EETimes (10/22/2016 08:00 AM EDT)
The average number of IP cores integrated into automotive SoCs is growing from about 20 today to more than 100 within the next five to ten years.
Today, the automobile industry is a key driver for technology innovation much like the mobile industry propelled growth in earlier part of the new millennium.
While the market for electronics in cars is relatively small in comparison to the mobile industry today, the growth rate is higher, which makes it all the more compelling for the next generation of SoC designs.
Much like the mobile industry before it, the growth in capabilities and features for automotive electronic systems is driving the transition from microcontrollers to ever more sophisticated microprocessors in ever more complex SoCs.
Application areas are expanding from engine control units into Advanced Driver Assistance Systems (ADAS), self-driving systems with over-the-air updating capabilities, active safety systems, infotainment systems and more.
In particular, ADAS are driving up the semiconductor bill-of-materials (BOM) in automobiles due to the requirements for advanced processing and sensing. Figure 1 below provides a breakdown for the growing semiconductor revenue as automation increases in cars.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related Articles
- NoC Interconnect Fabric IP Improves SoC Power, Performance and Area
- Low Power Design in SoC Using Arm IP
- How to manage changing IP in an evolving SoC design
- Why network-on-chip IP in SoC must be physically aware
Latest Articles
- RISC-V Functional Safety for Autonomous Automotive Systems: An Analytical Framework and Research Roadmap for ML-Assisted Certification
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities
- A 129FPS Full HD Real-Time Accelerator for 3D Gaussian Splatting
- SkipOPU: An FPGA-based Overlay Processor for Large Language Models with Dynamically Allocated Computation
- TensorPool: A 3D-Stacked 8.4TFLOPS/4.3W Many-Core Domain-Specific Processor for AI-Native Radio Access Networks