Big.LITTLE software is not so hard
Brian Jeff, ARM
EETimes (10/9/2012 4:44 AM EDT)
One of the questions I get asked most often about ARM big.LITTLE processor technology is, "how complicated is the software?"
In big.LITTLE processors, there are two distinct CPU clusters in the applications processor subsystem, one designed for optimum energy efficiency and the other designed for maximum performance in the device power budget. Software dynamically and seamlessly moves to the right-sized ARM Cortex core, either big or LITTLE, for the work at hand. This sounds quite complicated, but in reality it is an extension of the operating system power management software in wide use today on mobile phone SoCs.
To read the full article, click here
Related Semiconductor IP
- JESD204E Controller IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
Related Articles
- Big.LITTLE processing with ARM Cortex-A15 & Cortex-A7
- Improving SystemVerilog UVM Transaction Recording and Modeling
- Bridging software and hardware to accelerate SoC validation
- Software generated BCH as a way to solve challenges of providing multiple configuration IP
Latest Articles
- Crypto-RV: High-Efficiency FPGA-Based RISC-V Cryptographic Co-Processor for IoT Security
- In-Pipeline Integration of Digital In-Memory-Computing into RISC-V Vector Architecture to Accelerate Deep Learning
- QMC: Efficient SLM Edge Inference via Outlier-Aware Quantization and Emergent Memories Co-Design
- ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design
- COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events