Big.LITTLE processing with ARM Cortex-A15 & Cortex-A7
Peter Greenhalgh, ARM
EETimes (10/24/2011 4:33 PM EDT)
This white paper presents the rationale and design behind the first big.LITTLE system from ARM based on the high-performance Cortex-A15 processor, the energy efficient Cortex-A7 processor, the coherent CCI-400 interconnect and supporting IP.
The range of performance being demanded from modern, high-performance, mobile platforms is unprecedented. Users require platforms to be accomplished at high processing intensity tasks such as gaming and web browsing while providing long battery life for low processing intensity tasks such as texting, e-mail and audio.
In the first big.LITTLE system from ARM a ‘big’ ARM Cortex-A15 processor is paired with a ‘LITTLE’ Cortex-A7 processor to create a system that can accomplish both high intensity and low intensity tasks in the most energy efficient manner. By coherently connecting the Cortex-A15 and Cortex-A7 processors via the CCI-400 coherent interconnect the system is flexible enough to support a variety of big.LITTLE use models, which can be tailored to the processing requirements of the tasks.
To read the full article, click here
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
- SHA-256 Secure Hash Algorithm IP Core
Related Articles
- Graphics processing: When DIY just doesn't make sense
- Reconfiguring Design -> Reconfigurable computing aims at signal processing
- Reconfigurable signal processing key in base station design
- DSPs duel FPGAs for 3G baseband processing chores
Latest Articles
- Emulation-based System-on-Chip Security Verification: Challenges and Opportunities
- A 129FPS Full HD Real-Time Accelerator for 3D Gaussian Splatting
- SkipOPU: An FPGA-based Overlay Processor for Large Language Models with Dynamically Allocated Computation
- TensorPool: A 3D-Stacked 8.4TFLOPS/4.3W Many-Core Domain-Specific Processor for AI-Native Radio Access Networks
- Assertain: Automated Security Assertion Generation Using Large Language Models