Analyze high-speed interconnects
Anil Pandey, Agilent Technology
EDN (July 23, 2013)
Signal integrity (SI) addresses two key aspects in high-speed digital designs: signal timing and quality. SI analysis aims to ensure signals reach their destination in good condition. In a system, signals travel through various kinds of interconnections (e.g., from chip to package, package to RF board trace and trace to high-speed connectors), with any electrical impact happening at the source end, along the transmission path or at the receiving end, which affects both signal timing and quality. Connector performance directly affects system performance and reliability. As a result, designing and modeling connectors for multi-gigabit applications is one of the greatest challenges in high-speed digital applications.
When designing high-speed applications, signal transmission quality is a critical factor. At gigabit speeds, high-speed interconnects must be characterized along with the RF board traces. Ever-increasing demand for cleaner signal transmission means that maintaining good signal quality throughout the high-speed interconnects is crucial. Modern high-speed, multi-pin connectors are required to enable data transmission in systems at a very high rate (~ 5 Gbps). Early design changes based on accurate simulations can be indispensable and worthy investments for interconnect realization. Likewise, use of an accurate electromagnetic (EM) model is highly desirable during the design and implementation stage of high-speed interconnects. To achieve good SI, the designer must not only understand the system in which the connectors will be deployed, but also perform SI analysis of the RF board along with the connectors.
To read the full article, click here
Related Semiconductor IP
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
- PDM Receiver/PDM-to-PCM Converter
- Voltage and Temperature Sensor with integrated ADC - GlobalFoundries® 22FDX®
- 8MHz / 40MHz Pierce Oscillator - X-FAB XT018-0.18µm
Related Articles
- Understanding LTTPR: Enabling High-Speed DisplayPort Interconnects in Complex System Designs
- Consumer IC Advances -> Set- top box SoC ready for high-speed demands
- High-Performance DSPs -> Serial interconnects back high-performance computing
- High-speed fabrics deliver optimal IP implementation
Latest Articles
- An FPGA-Based SoC Architecture with a RISC-V Controller for Energy-Efficient Temporal-Coding Spiking Neural Networks
- Enabling RISC-V Vector Code Generation in MLIR through Custom xDSL Lowerings
- A Scalable Open-Source QEC System with Sub-Microsecond Decoding-Feedback Latency
- SNAP-V: A RISC-V SoC with Configurable Neuromorphic Acceleration for Small-Scale Spiking Neural Networks
- An FPGA Implementation of Displacement Vector Search for Intra Pattern Copy in JPEG XS