Restoring the artistry of analog design
Jeff Jussel, Ashutosh Mauskar, Magma Design Automation Inc.
10/26/2010 2:06 PM EDT
The fact is that analog design is the most difficult and detailed kind of electronic design. The scope of variables to be managed, the extreme sensitivities to circuit constraints, and the quality of results required make analog as much of an art form as it is a science. The engineers that choose to do analog design learn their craft over time and become experts in the nuance of each analog circuit – truly artisans in every sense of the word.
So, it is little wonder that analog design flows have resisted automation. There have been attempts of course. But most were either not generically applicable or required so much work to set up that they failed to deliver any productivity gain for seasoned analog designers. As a result, the basic analog design flow has remained constant for years.
Unfortunately, the increasing complexity of silicon processes and the pervasive growth in mixed-signal designs have combined to swamp analog design teams. As more projects pile on their plates, analog designers don’t have time to practice the creativity that originally attracted them to the field. To restore the artistry to analog design, new tool automation should focus on these major areas: design optimization, design closure, and design reuse.
To read the full article, click here
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
- P1619 / 802.1ae (MACSec) GCM/XTS/CBC-AES Core
Related White Papers
- Time-Domain Analog Design: Why and How
- Agile Analog's Approach to Analog IP Design and Quality --- Why "Silicon Proven" is NOT What You Think
- Advanced Topics in FinFET Back-End Layout, Analog Techniques, and Design Tools
- Simplifying analog and mixed-signal design integration
Latest White Papers
- FeNN-DMA: A RISC-V SoC for SNN acceleration
- Multimodal Chip Physical Design Engineer Assistant
- Attack on a PUF-based Secure Binary Neural Network
- BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement
- FD-SOI: A Cyber-Resilient Substrate Against Laser Fault Injection—The Future Platform for Secure Automotive Electronics