Gate arrays getting a new lease on life
Gate arrays getting a new lease on life
By Crista Souza, EBN
October 8, 2001 (6:20 p.m. EST)
URL: http://www.eetimes.com/story/OEG20011008S0061
After years of posting steady declines, the gate array market appears to be enjoying something of a renaissance as OEMs look for lower-cost alternatives to systems-on-a-chip and programmable logic. Suppliers that had abandoned gate arrays for higher-margin SoCs are polishing legacy product lines, while start-ups are touting new architectures for moderate-density, moderate-volume designs. Meanwhile, steadfast gate array makers say their business is hotter than ever. One PLD supplier is also taking another look. In an effort to retain customer designs as they move to volume production, Altera Corp. this week will formally relaunch its mask PLD (MPLD) program, renamed HardCopy. AMI Semiconductor (AMIS), Pocatello, Idaho, saw its design-ins increase 30% from the first to the second quarter, and business continued to rise in the third quarter, according to Vince Hopkin, vice president of the company's digital ASIC business unit. Hopki n attributed the sudden increase to the troubled economy, which is prompting OEMs to review every bill of materials and squeeze out cost. Often that entails re-spinning large FPGA designs into ASICs, or reconsidering whether nonrecurring engineering (NRE) fees on a 0.18-micron SoC are justified when a less-expensive 0.35-micron gate array-or two-will do the job. “Cost reduction has become a huge issue to most customers,” Hopkin said. “We're seeing a lot of companies jump back into the gate array market because of that.” NEC Electronics Inc., for example, recently trotted out a Web-based design collaboration tool aimed at the small to midsize gate array customers it once turned away in favor of high-volume SoC business. Today, the ASIC giant will go a step farther when it unveils the first of a planned family of embedded arrays. Dubbed SoCLite, the product consists of a fully tested and verified ARM7 processor core, memory and peripherals, and 190,000 gates of user logic in a 0.35-micron “sea o f gates” architecture. “The beauty of this offering is it's a standard microcontroller that's already debugged and working, and the user just has to write code for the application logic,” said David Lamar, senior marketing manager at NEC's System LSI business unit in Santa Clara, Calif. “We think this will help midrange customers build SoCs very quickly and with very low risk.” NEC executives said that despite waning gate array sales in recent years, a significant gap still exists between the capabilities of advanced programmable logic architectures and cell-based ASICs. Customers, they say, have been clamoring for a viable medium. But the renewed interest in gate arrays will likely be short-lived and opportunistic, according to analysts. Like anything else, cost reduction is cyclical, said Jordan Selburn, an analyst at iSuppli Corp., El Segundo, Calif. “There's no question about it, this is just a blip,” Selburn said. “Even on a double diamond [ski] slope, a mogul looks like an uptick.” Other analysts agree. Gartner Dataquest forecasts a continuing decline for the segment as PLDs fill traditional gate array sockets. After a slight uptick in 2000, gate array revenue is expected to fall to $2.53 billion this year, dropping to $1.55 billion by 2004. Seeing an opportunity to provide 30,000 to 3 million gate designs without high NREs or the high average selling prices of programmable devices, companies like Lightspeed Semiconductor Inc. are introducing architectures aimed at replacing FPGAs. Lightspeed, which produces mask programmable modular arrays, said FPGA-to-ASIC conversions are growing significantly faster than ground-up ASIC designs. Though two-thirds of Lightspeed's design wins have been on the ASIC side and a third on the FPGA conversion side, that ratio is expected to be reversed within a year. “We have customers who are scrambling to get FPGAs out of their systems because customers can't afford it,” said Dave Holt, president and chief executive of the Sunnyvale, C alif., company. “In the next 12 months, we will see a shift in the market [toward FPGA conversions].” To cash in on the trend, the company recently introduced the Lightning 4Em family, which is aimed at creating cost-reduced ASICs from designs based on Xilinx Inc.'s Virtex-E parts. AMIS has also discovered an opportunity in FPGA conversions, recently unveiling drop-in replacements for IP cores offered by top programmable logic suppliers. Meanwhile, AMIS continues to update its gate array processes and plans to introduce a 0.18-micron family in January, Hopkin said. Other specialty ASIC houses, like Chip Express Corp. and Clear Logic Inc., have zeroed in on the FPGA replacement market, converting Xilinx and Altera designs, respectively. Their success is what prompted Altera's HardCopy product line, which enables customers to reduce cost and allows Altera to retain design sockets in higher volume. Xilinx, which ditched its HardWire product line several years ago, has thus far shown no inter est in reviving it. Analysts believe the gate array market will continue to provide opportunities for niche suppliers. But larger suppliers returning to the market are not likely to succeed, iSuppli's Selburn said.
Related Semiconductor IP
- JESD204D Transmitter and Receiver IP
- 100G UDP IP Stack
- Frequency Synthesizer
- Temperature Sensor IP
- LVDS Driver/Buffer
Related White Papers
- A new way to do firmware development on programmable devices
- Taking advantage of new low-power modes on advanced microcontrollers
- Maximizing battery life on embedded platforms - Part 4. Turning off peripherals and subsystems
- How FPGAs are breathing new life into the analog video format
Latest White Papers
- New Realities Demand a New Approach to System Verification and Validation
- How silicon and circuit optimizations help FPGAs offer lower size, power and cost in video bridging applications
- Sustainable Hardware Specialization
- PCIe IP With Enhanced Security For The Automotive Market
- Top 5 Reasons why CPU is the Best Processor for AI Inference