Managing the Massive Data Throughput: AI-Based Designs and The Value of NoC Tiling
Andy Nightingale, VP Product Management & Marketing at Arteris, spoke to EE Journal’s Amelia Dalton on the fish fry podcast.
My podcast guest this week is Andy Nightingale, Vice President Product Management & Marketing at Arteris. Andy and I chat about the key challenge faced by SoC designers when building NoC interconnects for AI based designs, the details of NoC interconnect IP soft tiling and some real world examples of AI based designs that benefit from NoC IP soft tiling. Also this week, I check out how odor detection by the silkworm moth could improve localization technologies in robotics.
Related Semiconductor IP
- NoC System IP
- Non-Coherent Network-on-Chip (NOC)
- Coherent Network-on-Chip (NOC)
- High speed NoC (Network On-Chip) Interconnect IP
- Smart Network-on-Chip (NoC) IP
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