How to design robust SoC with ESD and power management IP
Join Bart Keppens (Chief Business Development at Sofics) and Hakim Jaafar (VP Marketing and Support at Dolphin Semiconductor) as they share expert insights on enhancing IoT SoC reliability with advanced ESD protection and power management IP.
Whether you’re designing next-gen SoCs or looking to optimize power efficiency and robustness, this session is packed with valuable takeaways you can apply right away.
Speakers
- Bart Keppens - Chief Business Development at Sofics
- Hakim Jaafar - VP Marketing and Support at Dolphin Semiconductor
Objectives
- Showcase collaboration between Sofics and Dolphin Semiconductor
- Introduce robust Sofics’ interface solution for Internet of Things (IoT) ICs
- Introduce Dolphin Semiconductor’s Power Management solution for smart SoC architecture
What you will learn
- The role of ESD Protection and Power Management in SoC Design
- Benefits of selecting the right IP blocks for your next IoT chip
- Example of power management network for SoCs
Related Semiconductor IP
- 1.8V general purpose I/O for 4nm FinFET
- Linear Regulator, ultra low quiescent current for retention mode
- NFC Power Management Unit (0.6/1.2/1.5 V output voltage, 10/20/50 uA output current, 2 MHz output clock frequency)
- Power management unit (0.9V, 1.8V, 3.3V output voltages, 1.2V reference voltage and 10uA/1uA reference currents)
- Power Management Subsystem
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