How to design robust SoC with ESD and power management IP
Join Bart Keppens (Chief Business Development at Sofics) and Hakim Jaafar (VP Marketing and Support at Dolphin Semiconductor) as they share expert insights on enhancing IoT SoC reliability with advanced ESD protection and power management IP.
Whether you’re designing next-gen SoCs or looking to optimize power efficiency and robustness, this session is packed with valuable takeaways you can apply right away.
Speakers
- Bart Keppens - Chief Business Development at Sofics
- Hakim Jaafar - VP Marketing and Support at Dolphin Semiconductor
Objectives
- Showcase collaboration between Sofics and Dolphin Semiconductor
- Introduce robust Sofics’ interface solution for Internet of Things (IoT) ICs
- Introduce Dolphin Semiconductor’s Power Management solution for smart SoC architecture
What you will learn
- The role of ESD Protection and Power Management in SoC Design
- Benefits of selecting the right IP blocks for your next IoT chip
- Example of power management network for SoCs
Related Semiconductor IP
- 1.8V Capable GPIO on Samsung Foundry 4nm FinFET
- Linear Regulator, ultra low quiescent current for retention mode
- Contain supply cells, power management, ring building, analog cells for TSMC N4P 1.8V IO Platform MS Add-on
- Contain supply cells, power management, ring building, analog cells for TSMC N4P 1.8V IO Platform
- TSMC N7 BaseKit contains supply cells, power management cells, ring building cells, other common cells, AG2 Platform
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