Architecture Exploration of SoC with Arm IP using VisualSim Architect
Learn to explore semiconductor architectures with VisualSim Architect—the exclusive public provider of architecture models for ARM v8/v9 processors and other ARM IPs including Corelink-Cyprus, AMBA AXI/CHI, GPU, DMA, DSU, and additional critical IP blocks. This webinar is designed for engineers and architects aiming to master advanced performance and power analysis techniques for both monolithic and chiplet-based SoCs, with a special emphasis on supporting ARM CHI and C2C interconnects.
What to Expect:
- In-Depth Modeling Techniques: Explore detailed architecture models for ARM v8/v9 processors and IP blocks such as Corelink-Cyprus, AMBA, GPUs, and more.
- Performance Debugging: Learn to measure latency, throughput, hit-ratio, and coherence behavior.
- Power Optimization: Discover strategies to reduce peak power consumption and resolve performance issues.
- Interactive Q&A Session: Get your technical questions answered by industry experts.
Related Semiconductor IP
- Specialized Video Processing NPU IP for SR, NR, Demosaic, AI ISP, Object Detection, Semantic Segmentation
- Ultra-Low-Power Temperature/Voltage Monitor
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
Related Videos
- How to design robust SoC with ESD and power management IP
- RISC-V at NVIDIA: One Architecture, Dozens of Applications, Billions of Processors
- Arm: From Cloud-to-Car Architecture
- SoC Clocking Architectures – Design and Implementation
Latest Videos
- Powering the AI Supercycle: Design for AI and AI for Design - Anirudh Devgan
- Scaling AI from Edge to Data Center with SiFive RISC-V Vectors
- Paving the Road to Datacenter-Scale RISC-V
- Enhancing Data Center Architectures with PCIe® Retimers, Redrivers and Switches
- How UCIe 3.0 Redefining Chiplet Architecture: From Protocol to Platform