Xilinx Releases New Reed-Solomon Solution for Below $10

IP News

SAN JOSE, Calif.----Feb. 7, 2000--Xilinx, Inc., announced today the immediate availability of its flexible and cost-effective Reed-Solomon solution, enabling designers to significantly cut cost and accelerate time-to-market compared to fixed function ASSP solutions.

Forward Error Correction (FEC) used in a wide range of digital communications and image processing applications such as wireless, DSL modems, Digital TV, and DVB, are commonly implemented using Reed-Solomon coding. The Xilinx® Reed-Solomon solution includes user parameterizable encoder and decoder LogiCORE(TM) products optimized for the Xilinx Virtex(TM), Virtex-E, Spartan(TM), Spartan-XL, and XC4000(TM) FPGA families. In addition, the LogiCORE products support the recently announced Spartan-II FPGA family, and as a result, designers of high-volume applications can implement a complete Reed-Solomon solution for less than $10.

With the Xilinx LogiCORE Reed-Solomon products users can choose from a list of pre-defined Reed-Solomon coding standards including ATSC, IESS-308, and DVB, or define a custom coding scheme. As a part of the Xilinx Silicon Xpresso(TM) initiative, the cores are configured and downloaded over the Internet by an easy-to-use configuration tool, which will give customers instant access to the latest releases.

``Once again, Xilinx demonstrates that it can deliver flexible silicon/IP solutions to improve time-to-market for its customers,'' said Babak Hedayati, director of Intellectual Property Marketing and Business Development. ``By providing predictable and parameterizable Reed-Solomon cores with Spartan-II, Xilinx is offering a whole new value proposition previously not available to designers.''

The Xilinx LogiCORE Reed-Solomon cores were created under a joint development program with Integrated Silicon System, Ltd. (ISS) announced last year. The new cores are based on ISS's already proven and widely used HDL cores. Xilinx has incorporated its unique Smart-IP(TM) technology in the cores so that users can automatically configure the Reed-Solomon core and always achieve a predictable, highly optimized implementation with the highest possible performance, unaffected by device size and surrounding user logic. Predictable performance becomes especially important when the Reed-Solomon cores are integrated with other system functions in Xilinx FPGAs. The Spartan-II family provides the lowest-cost alternative by delivering 100,000 system gates for under $10, at speeds of 200 MHz and beyond. The Xilinx Reed-Solomon solution in conjunction with Spartan-II FPGAs provides a solution that is unparalleled in the industry in cost and flexibility. In the table below, the features and cost of the Xilinx Reed-Solomon core implemented in Spartan-II are compared with a typical Reed-Solomon ASSP solution.

License price and availability

The Xilinx LogiCORE Reed-Solomon cores are available now, as well as data sheets and more product information, and can be configured and downloaded over the Internet from the Xilinx IP-Center(TM) (www.xilinx.com/ipcenter). The price for the Encoder core (DO-DI-RSE) is $500 and the price for the Decoder core (DO-DI-RSD) is $5,000. Both cores support Spartan, Virtex, and XC4000 FPGA series.

Xilinx is the leading innovator of complete programmable logic solutions, including advanced integrated circuits, software design tools, predefined system functions delivered as cores, and unparalleled field engineering support.

Founded in 1984 and headquartered in San Jose, Xilinx invented the field programmable gate array (FPGA) and fulfills more than half of the world demand for these devices today. Xilinx solutions enable customers to reduce significantly the time required to develop products for the computer, peripheral, telecommunications, networking, industrial control, instrumentation, high-reliability/military, and consumer markets. For more information, visit the Xilinx web site at www.xilinx.com.