Virata, Tality establish DSL chip design centers

Virata, Tality establish DSL chip design centers

EETimes

Virata, Tality establish DSL chip design centers
By Semiconductor Business News
August 31, 2000 (5:21 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000831S0029

SANTA CLARA, Calif. - Virata Corp. here today formed a partnership with Tality Corp. under which the companies will establish a network of design centers in the Digital Subscriber Line (DSL) sector.

The company's Authorized Design Center Program will help Virata's DSL chip customers accelerate their product develop cycles, according to Mike Gulett, president and chief operating office of Virata. "Today's DSL technology environment is very challenging because we are dealing with issues of complexity, time-to-market and advancing technology," Gulett said.

"The Authorized Design Center program addresses these challenges by offering a unique, custom equipment design service that allows our customers to deploy Virata's technology more quickly and efficiently into the design and development of next-generation DSL products," he said.

"By partnering with Virata, we will provide DSL and other broadband equipment developers with the design capabili ties and infrastructure necessary to help them get their products from concept into production, quickly and cost-effectively," said Bob Wiederhold, president and chief executive of Tality, formerly the Electronic Design Services group of Cadence Design Systems Inc. of San Jose, Calif.

The deal marks the second announcement made by Tality in recent times. Earlier this week, DSP Group Inc., a supplier of digital signal processors, approved Tality as a system-on-chip (SoC) design center for its customers (see Aug. 30 story ).

Copyright © 2003 CMP Media, LLC | Privacy Statement
×
Semiconductor IP