Cadence's Tality subsidiary cuts 200 jobs, closes design centers
Cadence's Tality subsidiary cuts 200 jobs, closes design centers
By Semiconductor Business News
February 8, 2002 (6:00 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020208S0098
SAN JOSE -- Tality Corp. today announced it will eliminate 200 jobs and restructure its wireline communications business as it focuses more attention on its IC design and intellectual property (IP) business. The engineering services subsidiary of Cadence Design Systems Inc. said it will no longer provide board-level, mechanical and packaging services for data communication and telecom equipment. Tality's wireless business remains unchanged. "Our chip-level business has remained relatively healthy for the past 12 months despite the battering the communications industry as a whole has taken," said Brent Hudson, president of Tality. "With growth expected to return first to the chip sector of the industry, we need to focus our effort in order to fully capitalize on the market recovery. "Strengthening our IP position and continuing to build on our strong silicon design value proposition are our top priorities for the wireline communications segme nt of our business," he said. Tality will close its design centers in Ottawa, Lowell, Mass., and Noida, India. A restructuring charge of $25 million will be taken in the first quarter to cover severance, facility closures, and related asset write-offs, said the Cadence subsidiary.
Related Semiconductor IP
- ISO/IEC 7816 Verification IP
- 50MHz to 800MHz Integer-N RC Phase-Locked Loop on SMIC 55nm LL
- Simulation VIP for AMBA CHI-C2C
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- USB 20Gbps Device Controller
Related News
- Cadence Accelerates SoC, 3D-IC and Chiplet Design for AI Data Centers, Automotive and Connectivity in Collaboration with Samsung Foundry
- Titan Subsidiary LinCom Wireless Obtains Key Software Intellectual Property License for Next Generation LAN Chipset From Tality Corporation
- Virata, Tality establish DSL chip design centers
- ARM cuts jobs after first dip in sales
Latest News
- Quintauris and Andes Technology Partner to Scale RISC-V Ecosystem
- Europe Achieves a Key Milestone with the Europe’s First Out-of-Order RISC-V Processor chip, with the eProcessor Project
- Intel Unveils Panther Lake Architecture: First AI PC Platform Built on 18A
- TSMC September 2025 Revenue Report
- Andes Technology Hosts First-Ever RISC-V CON in Munich, Powering Next-Gen AI and Automotive Solutions