TSMC Creates Design Options for New 3nm Node
By Alan Patterson, EETimes (June 22, 2022)
Taiwan Semiconductor Manufacturing Co. (TSMC) has created versions of its upcoming 3nm FinFET node that’s ramping up later this year, allowing chip designers to enhance performance, power efficiency, and transistor density — or select a balance of those options.
TSMC’s 3nm technology, starting production later in 2022, will feature the company’s FinFlex architecture offering choices of standard cells with a 3–2 fin configuration for performance, a 2–1 fin configuration for power efficiency and transistor density, or a 2–2 fin configuration for efficient performance.
To read the full article, click here
Related Semiconductor IP
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- 25MHz to 4.0GHz Fractional-N RC PLL Synthesizer on TSMC 3nm N3P
- USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
- TSMC CLN5FF GUCIe LP Die-to-Die PHY
- Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
Related News
- A closer look at TSMC's 3-nm node and FinFlex technology
- TSMC Expansion in Arizona to Target 3-nm Node
- Alphawave Semi Launches Industry's First 3nm UCIe IP with TSMC CoWoS Packaging
- Unveiling the Availability of Industry's First Silicon-Proven 3nm, 24Gbps UCIe™ IP Subsystem with TSMC CoWoS® Technology
Latest News
- RAAAM Memory Technologies announces $17.5M Series A investment led by NXP Semiconductors to bring its innovative on-chip memory solution to mass production
- SEMI Reports Worldwide Silicon Wafer Shipments Increase 3% Year-on-Year in Q3 2025
- Logic Fruit Technologies Appoints Sunil Kar as President & CEO to Accelerate Global Growth
- EnSilica plc - Audited Results for the Year Ended 31 May 2025
- Thalia Design Automation announces AMALIA Platform release 25.3 qualified for advanced process nodes down to 4nm