Tomorrow's Platform: Multicore, SoCs and IP
By Jessica Davis, Electronic News
9/7/2006
After a long career of providing more computing through higher frequency and greater density, the microprocessor is headed for a retirement of sorts.
But far from the traditional retirement, the microprocessor’s new role will be more of a career change, as the device continues its work but becomes part of a larger team. That was the message from Grant Pierce, Sonics president and CEO, in a keynote address offered during the Semico Research Forecast event in San Jose Wednesday.
9/7/2006
After a long career of providing more computing through higher frequency and greater density, the microprocessor is headed for a retirement of sorts.
But far from the traditional retirement, the microprocessor’s new role will be more of a career change, as the device continues its work but becomes part of a larger team. That was the message from Grant Pierce, Sonics president and CEO, in a keynote address offered during the Semico Research Forecast event in San Jose Wednesday.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
- CAN-FD Controller
Related News
- Ceva Launches Multi-Protocol Wireless Platform IP Family to Accelerate Enhanced Connectivity in MCUs and SOCs for IoT and Smart Edge AI Applications
- Faraday Unveils HiSpeedKit™-HS Platform for High-speed Interface IP Verification in SoCs
- SoCs Get a Helping Hand from AI Platform FlexGen
- Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
Latest News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP