Technology Trends: DDR4 first look

Kristin Lewotsky, EETimes
9/27/2012 2:26 PM EDT

Some seven years after launching development of DDR4, JEDEC has officially released the new standard (JESD79-4). DDR4 features a per-pin data rate of 1.6 GT/s, with an initial maximum objective of 3.2 GT/s. With DDR3 exceeding its original targeted performance of 1.6 GT/s, look for higher performance speed grades to be added in future releases. The DDR4 architecture consists of an 8n prefetch with two or four selectable bank groups, which enables simultaneous activation, read, write, or refresh operations to be conducted in each unique bank group. The standard was also designed to encompass stacked memory, with stacks of up to eight memory devices acting as a single signal load. With the announcement, we thought it was a good opportunity to sit down with Todd Farrell, chairman of the JC-42.3C Subcommittee for DRAM Timing and director of technical marketing at Micron, to learn more.

To read the full article, click here