Tality tips 802.11 MAC

Tality tips 802.11 MAC; Mentor targets Excalibur
By Michael Santarini, EE Times
November 12, 2001 (11:00 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011112S0019

Tality Corp. is aiming its high-performance media-access controller for IEEE-802.11 wireless-LAN baseband chips at embedded and hosted applications. The offering consists of a synthesizable MAC core and protocol stack. The San Jose, Calif., company, a Cadence subsidiary, has put the core in three platform-based configurations: a dual-mode IEEE-802.11a/b design utilizing two ARM7TDMI processors, a similar design using a single ARM9 CPU and an IEEE-802.11b (Wi-Fi) design utilizing a single ARM7TDMI.

Tality said the MAC offering was developed from the ground up for maximum data throughput with minimum processor load and chip power consumption. The core and protocol stack were co-developed as an optimized, integrated system for the 54-Mbit/second wireless LANs. The protocol stack's modular architecture enables rapid modification to conform to evolution in the IEEE-802.11 spec, including enhancements such as 802.11g, 11e and 11i, Tality said.

The MAC is said to execute all data path functions, leaving the host processors to manage and control the protocol at an abstracted level. Integrated power control automatically closes down circuits not in use, and a separate timer enables almost complete system shutdown in standby mode.

Tality said its three ARM-based configurations are complete baseband designs with all necessary I/O, memory interfaces and an optional CardBus interface for PC-based applications. The MAC core and its predesigned baseband configurations are available now and have been licensed by two unidentified customers. Tality said it is working on security enhancements compliant with IEEE 802.11i and will offer an upgrade in the future to comply with 802.11e, a quality-of-service specification to support video streaming and other real-time applications. Visit www.tality.com.

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Mentor Graphics Corp. has tailored some of its Inventra communications cores to work in Altera Co rp.'s Excalibur ARM-based embedded-processor solutions. As a member of the Altera Megafunction Partnership Program, Mentor has been developing cores, such as those in the Inventra IPX core library, that are pre-optimized for integration into Altera programmable logic devices. The four new cores are expressly designed for use with the Excalibur family, with the aim of speeding development of system-on-programmable-chip applications. The companies said the cores target next-generation networking, mobile communications, computer and consumer products such as residential gateways, mass storage, game consoles and navigation systems.

The Inventra cores include the MUSBFSFC, a USB 1.1 full-speed function controller; the MCAN2.0, a CAN 2.0 network controller; the MI2CV2, an I2C 2.0 bus interface; and the M16550S, an enhanced UART with FIFO and synchronous CPU interface. The companies said Mentor added wrappers to allow the cores to work with ARM bus architectures. Additional communication cores for Excalibur ARM-based embedded processors will be added in the near future, Mentor said. For data sheets and other product information, visit www.mentor.com/inventra. For a complete list of cores pre-optimized for use with Excalibur ARM-based devices, see www.altera.com/ipmegastore.