Atrenta's SpyGlass-CDC Solution Boosts IP Integration Efficiency for Fujitsu Kyushu Network Technologies
San Jose, Calif., Nov. 17, 2009 - Atrenta Inc., the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow, today announced that Fujitsu Kyushu Network Technologies, a leader in innovative technologies for network and service management solutions, has adopted its SpyGlass®-CDC product. Fujitsu Kyushu Network Technologies will broadly deploy the tool to help reduce design risks associated with semiconductor IP integration.
Early Design Closure solutions from Atrenta allow design capture, verification, optimization and exploration early in the design flow at the register transfer language (RTL) stage, when it's faster and easier to correct problems and explore alternatives. This approach facilitates propagation of design efficiencies to detailed, back-end implementation with minimized schedule risk.
Atrenta's SpyGlass-CDC product analyzes system-on-chip (SoC) designs to ensure complex clock synchronization schemes such as FIFOs and handshakes are correct. Bugs in faulty clock domain synchronizations between IP blocks on a chip are hard to find with conventional design tools and represent a leading cause of chip re-spins and field reliability issues. "Atrenta's SpyGlass-CDC product allows us to ensure correct clock synchronization in our complex ASIC and FPGA designs," said Yuji Yoshitani, senior engineer at Fujitsu Kyushu Network Technologies System Logic Development Center. "We have deployed SpyGlass-CDC as a mandatory part of our ASIC and FPGA design flows to verify correct synchronization as early as possible and allow us to take corrective action if necessary."
"The use of third party semiconductor IP from multiple sources, with multiple clock domains, is a fact of life these days for complex SoCs," said Mike Gianfagna, vice president of marketing at Atrenta. "Our SpyGlass-CDC product is very effective at finding clock synchronization bugs that can easily become chip killers. We're delighted that Fujitsu Kyushu Network Technologies has chosen SpyGlass to assist with their leading edge designs."
About Atrenta
Atrenta is the leading provider of Early Design Closure® solutions to radically improve design efficiency throughout the IC design flow. Customers benefit from Atrenta tools and methodologies to capture design intent, explore implementation alternatives, validate RTL and optimize designs early, before expensive and time-consuming detailed implementation. With over 150 customers, including the world's top 10 semiconductor companies, Atrenta provides the most comprehensive solution in the industry for Early Design Closure. For more information, visit www.atrenta.com.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Quantum Motion Announces Record Integration of Quantum Devices and Partnership with Semiconductor Manufacturer, GlobalFoundries
- Qualitas Semiconductor and Verisilicon signed a licensing agreement for 4nm PCIe 6.0 PHY IP
- Qualitas Semiconductor Signs IP Licensing Agreement with Edge AI Leader Ambarella
- Qualitas Semiconductor entered into IP Licensing Agreement with a Leading Korean System Semiconductor Design Company
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack