SEGGER licenses C++ runtime library to SiFive for code size and performance efficiency
September 29, 2022 -- SEGGER, a leading supplier of RTOS and software libraries, debug and trace probes, in-system flash programmers, and software development tools, is proud to announce that SiFive, Inc., the founder and leader of RISC-V computing, has licensed SEGGER’s cutting-edge emRun++ C++ library for RISC-V.
emRun++ is a complete C++ standard library specifically designed and optimized for GCC/LLVM-based toolchains and embedded systems. It is based on SEGGER's efficient emRun and emFloat runtime and floating-point libraries.
“After licensing and integrating SEGGER’s emRun C runtime library for RISC-V into our Freedom Studio IDE and Freedom Tools packages in 2021, and experiencing its superior code size and performance compared to existing open-source alternatives, the next step was to consider C++ support. It was an easy decision to upgrade to emRun++ once it became available for licensing,” said Sam Grove, Director of Product Management — Software at SiFive. “As a modern programming language, C++ has become increasingly important in the embedded sector, offering developers more and more options. It is essential for SiFive to be able to offer a state-of-the-art C++ library to our customers. emRun++ is perfectly suited for this purpose.”
“SEGGER’s emRun++ is a proven part of our multi-platform Embedded Studio IDE. The memory footprint and the performance are simply amazing,” says Rolf Segger, founder of SEGGER. “SiFive customers have already been enjoying the benefits of the SEGGER emRun C library, and soon, C++ developers using SiFive tools will also benefit from emRun++.”
emRun++ guarantees fast heap operations with a low instruction count, enabling even hard real-time applications to be written in C++. To support common embedded use cases even on resource-constrained targets, the C++ library is available in a “no-throw” configuration, avoiding overhead associated with exceptions.
Designed specifically for embedded systems, emRun++ provides interrupt-safe memory management, allowing use of C++ in Interrupt Service Routines.
emRun++ includes a complete C++17 Standard Library with standard algorithms (sorting, searching, transformations), generic container templates (such as sets, vectors, lists, queues, stacks, maps), function objects, iterators, localization, strings and streams, and utility functions for everyday use cases.
For more information on emRun++, please visit:
https://www.segger.com/products/development-tools/emrunpp/
Related Semiconductor IP
- 64 bit RISC-V Multicore Processor with 2048-bit VLEN and AMM
- RISC-V AI Acceleration Platform - Scalable, standards-aligned soft chiplet IP
- 32 bit RISC-V Multicore Processor with 256-bit VLEN and AMM
- All-In-One RISC-V NPU
- ISO26262 ASIL-B/D Compliant 32-bit RISC-V Core
Related News
- SEGGER's emRun Runtime Library Licensed by SiFive for Superior Code Size and Performance Improvements
- TSMC opens Tainan fab, plus 300-mm pilot line
- Actel Announces Low-Cost Evaluation Platform For ProASIC PLUS FPGAs
- Verisity Upgrades AHB e Verification Component; AHB e Verification Component v2.0 Adds eRM Compliance, Plus Multi-Layer and AHB-Lite Support
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack