Scaling Down Semi Process Nodes for IoT Apps
Bernard Cole, EETimes
11/9/2015 10:00 AM EST
In recent months, some major semiconductor companies and IC foundries have announced that they have scaled down transistor sizes in ICs to as little as 14 nanometers, setting the stage for the next step in reducing size and cost of Internet of Things system-on-chip designs.
Not so fast, said Tom Starnes, semiconductor industry analyst at Objective Analysis. He points out that most of these announcements have more to do with standard microprocessor architectures and are unrelated to the requirements of Internet of Things (IoT} devices.
To read the full article, click here
Related Semiconductor IP
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
Related News
- Thalia Design Automation announces AMALIA Platform release 25.3 qualified for advanced process nodes down to 4nm
- Chipidea unveils a comprehensive, multi standard WLAN/WiMAX AFE portfolio in tech nodes down to 90nm
- Cadence Enhances Unified Custom/Analog Flow to Boost Productivity at Nodes Down to 20nm
- Synopsys and Samsung Foundry Collaborate to Deliver Fastest Design Closure and Signoff for Process Nodes Down to 3nm
Latest News
- SAICEC and Siemens to accelerate chip-to-vehicle validation using digital twin technology
- StarFive Launches New Product, Achieving RISC-V’s Breakthrough in Large-Scale Data Center Commercialization
- d-Matrix and Alchip Announces Collaboration on World's First 3D DRAM Solution to Supercharge AI Inference
- d-Matrix and Andes Team on World's Highest Performing, Most Efficient Accelerator for AI Inference at Scale
- Ceva Receives 2025 IoT Edge Computing Excellence Award from IoT Evolution World