CEVA Releases SATA3.0 IP for 6Gbps SSD Applications
Advanced Serial ATA Device IP with NCQ Acceleration and CPU offloading features offers best-in-class solution for Solid State Drives
SAN JOSE, Calif., April 7, 2010-- CEVA, Inc. (Nasdaq: CEVA); (LSE: CVA), the leading licensor of silicon intellectual property (SIP) platform solutions and DSP cores, today announced the availability of the CEVA-SATA3.0 Device Controller IP. Building on extensive experience with SSD customers, CEVA has upgraded its SATA Device Controller IP to provide 6Gbps line rate for faster data transfers, doubling the throughput from the previous generation. The IP has already been licensed to a leading FLASH memory semiconductor manufacturer for use in their future SSD designs.
The CEVA-SATA3.0 IP incorporates the latest Native Command Queuing (NCQ) specifications for Isochronous data transfers and queue management which in turn enables prioritized transfers of streaming audio and video data. In addition, CEVA has further developed the unique CPU off-loading features of the Controller IP, resulting in significantly improved overall system performance. With an option to embed an advanced encryption engine and retaining software compatibility against the previous SATA 2.6 Controller, the CEVA-SATA3.0 Device Controller IP offers a compelling SATA solution for both existing and new licensees.
"Solid State Drives, with their rapid evolution in terms of capacity, reliability and performance, are becoming the lead adopter for 6Gbps SATA," said Aviv Malinovitch, vice president, Operations at CEVA. "Our CEVA-SATA3.0 unleashes the full performance potential of next-generation SSD products while also offering the added benefit of offloading the CPU by assisting in the processing of the 6Gbps transactions."
CEVA-SATA3.0 Device Controller IP is a licensable RTP IP package, accompanied by a complete set of deliverables including a comprehensive simulation environment, example C source code and an FPGA-based demonstration platform. The latter runs at full 6Gbps line rate and employs the embedded SerDes functions of the latest generation FPGA products. In addition, example integration reference designs can be provided for leading 3rd party 6Gbps Phy technology providers. Suitable for ASIC, ASSP and FPGA deployment, the CEVA-SATA3.0 Controller IP is ideal for designers looking to implement 6Gbps SATA on next-generation SSD and other high performance storage products.
Information and further details are available from the CEVA at www.ceva-dsp.com/products/platforms/sata.php
About CEVA, Inc.
CEVA is the leading licensor of silicon intellectual property (SIP) DSP Cores and platform solutions for the mobile handset, portable and consumer electronics markets. CEVA's IP portfolio includes comprehensive technologies for cellular baseband (2G / 3G / 4G), HD video and audio, voice over packet (VoP), Bluetooth, Serial Attached SCSI (SAS) and Serial ATA (SATA). In 2009, CEVA's IP was shipped in over 330 million devices, including handsets from all top five handset OEMs – Nokia, Samsung, LG, Motorola and Sony Ericsson. Today, more than one in every four handsets shipped worldwide is powered by a CEVA DSP core. For more information, visit www.ceva-dsp.com
Related Semiconductor IP
- SATA 6G PHY in GF (40nm, 28nm)
- SATA 6G PHY
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 12SF++
Related News
- Introducing USB 3.0, PCIe 2.0 and SATA 3.0 Combo PHY IP Cores to empower Next Gen Connectivity Chipsets
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores for High Bandwidth, Low Power data communication in PCs, Mobiles, SSDs, and other Multimedia Devices.
- Synopsys' DesignWare Verification IP Enhanced to Support New SATA 6Gbps Specification
- Synopsys Releases DesignWare SATA IP for New SATA 6Gbps Data Transfer Rate
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers