USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores for High Bandwidth, Low Power data communication in PCs, Mobiles, SSDs, and other Multimedia Devices.
November 1, 2021 – T2MIP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the immediate availability of its partner’s USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores which are silicon proven in major Fabs and Nodes and in mass production with full certification, has small area and low power with Simple integration and Flexible customization.
This combo PHY IP Cores consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.0 Base Specification with support of PIPE interface spec, Universal Serial Bus (USB) compliant with the USB 3.0. USB 2.0 (USB High-speed and Full speed) and Serial ATA (SATA) compliant with SATA 3.0 Specification. This Combo PHY IP Cores achieves Lower power consumption due to support of additional PLL control, reference clock control, and embedded power gating control. Also, since low power mode setting is configurable, the PHY is widely applicable for various scenarios under different consideration of power consumption.
USB 3.0 PCIe 3.0 SATA 3.0 Combo PHY IP Cores is a high performance SERDES IP designed for chips that perform high bandwidth data communication while operating at low power consumption. Combo PHY IP Cores support multiple protocol speeds including USB3.0 Super Speed (5GT/s), PCIE Gen1/Gen2/Gen3 (2.5GT/s/ 5GT/s/ 8GT/s) and SATA Gen1/Gen2/Gen3 (1.5GT/3GT/6GT). This IP Core includes two major blocks, PMA, and PCS. This IP Core is fully compatible with PIPE4 interface specification with 20bit/16bit selectable parallel data bus. The Combo IP core has independent channel power down control, Programmable transmit amplitude and FFE. To compensate insertion loss Receiver equalization Adaptive-CTLE and DFE are implemented.
USB 3.0 PCIe 3.0 SATA 3.0 Combo PHY IP Core along with MAC Controllers IP Cores are available independently or pre-integrated as a fully validated and integrated solution. The Combo PHY IP Core and MAC Controllers IP Cores can also be licensed separately and integrated with third-party PHY / Controller solutions and can also be customized as per customer requirements.
This USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Core have been used in semiconductor industry’s Cellular Electronics, PC, Data storage (SSDs), Multimedia Devices and other Consumer Electronic products worldwide.
In addition to USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes Standalone USB, PCIe, Serial ATA and also HDMI, Display Port, MIPI, DDR, 10/100/1000 Ethernet, V by One, programmable SerDes, and many more Controllers with matching PHYs, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.
Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo
About T2M: T2MIP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related News
- Introducing USB 3.0, PCIe 2.0 and SATA 3.0 Combo PHY IP Cores to empower Next Gen Connectivity Chipsets
- USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP cores with Superfast speed and High-power efficiency for lag-less data processing is Silicon Proven and available in 8nm LPP for licensing
- USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP in 12nm, 16nm and 22nm process nodes with simple integration and flexible customization is ready for immediate licencing for your advanced SoC design
- Introducing the Cutting-Edge USB 3.0/ PCIe 3.0 Combo PHY IP Core in 28HPC+ for High-Performance SoC Designs
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers