Rockfish Technology Launches Interlaken Verification IP
-- Rockfish Technology today announced the release of its second generation Verification IP with the addition of the Interlaken Bus Functional Model (BFM). Interlaken is a new high speed chip-to-chip interconnect protocol developed jointly by Cisco Systems and Cortina Systems.
Rockfish Technology’s strategy to gain market share in the verification IP space is to offer attractive licensing terms. “Our goal is to provide our customers the maximum possible value by delivering the IP unencrypted and free of usage restrictions at an attractive price,” said Jason Jones, Founder Rockfish Technology. “Our customers may modify and use the IP freely as their own.”
The new Interlaken offering augments Rockfish Technology’s existing Ethernet SGMII and XAUI BFMs. The Ethernet BFMs offer a solution for the network line side of a device. Now Rockfish Technology’s offerings with the Interlaken BFM cover both the line side and device side of a networking ASSP.
The Interlaken BFM has an easy to use interface for the customer’s testbench consisting of a clocked data bus and control lines. Alternatively, Rockfish Technology offers a SystemVerilog packet based testbench for those customers needing a complete solution.
About Rockfish Technology
Rockfish Technology, an Electronic Design Automation (EDA) and design services company for the semiconductor industry, incorporated in 2005 in California. Rockfish Technology’s focus is providing the key IP and services to augment the customers functional verification effort and ensure the highest quality customer RTL.
Related Semiconductor IP
- Interlaken Verification IP
- Interlaken Look-Aside Intel® FPGA IP
- Interlaken Intel® FPGA IP
- Interlaken Controller
- Interlaken Verification IP
Related News
- Cswitch Corporation Selects Rockfish Technology for Interlaken Verification IP
- OPENEDGES Technology Expands ISO 26262 ASIL-B Certificationto Network-on-Chip IP
- Silicon Creations Announces 1000th Production FinFET Tapeout at TSMC and Immediate Availability of Full IP Library on TSMC N2 Technology
- Credo Launches 224G PAM4 SerDes IP on TSMC N3 Process Technology
Latest News
- TES offers new High-Speed Comparator IPs for X-FAB XT018 - 0.18µm BCD-on-SOI technology.
- QuickLogic Reports Fiscal Fourth Quarter and Full Year 2025 Financial Results
- MIPS, GlobalFoundries Bet on Physical AI
- IPrium releases LunaNet AFS LDPC Encoder and Decoder for Lunar Navigation Satellite Systems
- Quintauris Introduces Altair: The Unified RISC-V Profile for Embedded Systems