Researchers Explore Emerging Memories for AI
By Gary Hilson, EETimes
December 28, 2018
At the International Electron Devices Meeting (IEDM) in San Francisco earlier this month, there were several papers presented that dealt with using emerging memory in neomorphic computing from companies the likes of IBM and various universities.
To read the full article, click here
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- IPSEC AES-256-GCM (Standalone IPsec)
- Parameterizable compact BCH codec
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
Related News
- 4DS Unveils New Interface Switching ReRAM Technology for Faster and Energy Efficient Memory for AI Processing
- Cadence Introduces Industry-First LPDDR6/5X 14.4Gbps Memory IP to Power Next-Generation AI Infrastructure
- JEDEC Releases New LPDDR6 Standard to Enhance Mobile and AI Memory Performance
- NEO Semiconductor Introduces World’s First Extreme High Bandwidth Memory (X-HBM) Architecture for AI Chips
Latest News
- Mythic to Challenge AI’s GPU Pantheon with 100x Energy Advantage and Oversubscribed $125M Raise
- Accelerating Vehicle Electrification and Intelligence to Drive Automotive Semiconductor Market to Nearly US$100 Billion by 2029
- Cassia.ai Achieves Breakthrough in AI Accelerator Technology with Successful Tapeout of two Test Chips
- Toshiba to accelerate semiconductor design innovation with Siemens’ EDA software
- SEMIFIVE Strengthens AI ASIC Market Position Through IPO “Targeting Global Markets with Advanced-nodes, Large-Die Designs, and 3D-IC Technologies”