PMC-Sierra plans to use 32-bit cores from MIPS Technologies
PMC-Sierra plans to use 32-bit cores from MIPS Technologies
By Semiconductor Business News
March 6, 2001 (11:27 a.m. EST)
URL: http://www.eetimes.com/story/OEG20010306S0016
MOUNTAIN VIEW, Calif. -- MIPS Technologies Inc. here today (March 6) announced it has licensed its 32-bit embedded processor technology to PMC-Sierra Inc. for use in chip products aimed at networking applications. PMC-Sierra in Burnaby, British Columbia, already uses MIPS Technologies' 64-bit processor cores. "Licensing their 32-bit technology expands our product offerings for the access and core broadband infrastructure markets," said Kevin Huscroft, vice president of R&D and chief technology officer at PMC-Sierra. Terms of the new licensing pact were not released. PMC-Sierra also did not release details about its 32-bit product plans or the timing when new chip will be introduced.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- MIPS Technologies and TSMC form strategic alliance to deliver "hard" versions of MIPS 32 and 64 Bit Processor Cores
- ChipX Partners with Beyond Semiconductor to Offer 32 bit Processors
- AKA Introduces New High Performance 32 bit ARM9-based Smart Logic Module
- Cortus Announces FPS6 32 bit Floating Point Microcontroller IP Core for High Performance Control and Signal Processing Applications
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack