Path to 2nm May Not Be Worth It
Diminishing returns may evaporate at 5nm
Rick Merritt, EETimes
3/23/2018 01:01 AM EDT
SANTA CLARA, Calif. — Engineers see many options to create 5-, 3- and even 2-nm semiconductor process technologies, but some are not sure they will be able to squeeze commercial advantages from them even at 5nm.
The increasing complexity and cost of making ever smaller chips is leading to diminishing returns. Data rates are peaking at 3 GHz for mobile processors, and power and area gains will narrow at 7nm, said a Qualcomm engineer in a panel at a Synopsys user group event here.
Speed gains of 16 percent at 10nm may dry up at 7nm due to resistance in metal lines. Power savings will shrink from 30 percent at 10nm to 10-25 percent at 7nm, and area shrinks may decline from 37 percent at 10nm to 20-30 percent at 7nm, said Paul Penzes, a senior director of engineering on Qualcomm’s design technology team.
For decades, the electronics industry followed a roadmap codified by Moore’s Law of doubling the number of transistors on a chip roughly every two years. The result was a fast pace of ever smaller, faster, cheaper products from PCs to smartphones.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- The IP double standard: Why is it OK to pay for innovation in a product, but not when innovation is the product?
- Like it or not, IP's here to stay
- Four reasons why MIPS new cores may make it relevant again
- Apple, HTC patent deal may not open Android door
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack