OpenFive Licenses Flex Logix's eFPGA to Develop a Low Power Communications SoC Requiring a Large eFPGA
EFLX eFPGA enables the development of communications ICs that are smaller, lighter and consume lower power than using traditional FPGAs
MOUNTAIN VIEW, Calif., Dec. 7, 2020 -- Flex Logix® Technologies, Inc., supplier of the fastest and most-efficient AI edge inference accelerator and the leading supplier of eFPGA IP, announced today that OpenFive, a leading provider of domain-specific custom silicon solutions with differentiated IP, has licensed the EFLX eFPGA for use in a low power communications SoC, powerful and flexible enough to be used in data center and edge applications, for a mutual customer of OpenFive and Flex Logix.
eFPGA for Communications Applications
Communications systems today are major users of FPGAs for flexibility and reconfigurability for customization and real-time updating of protocols and algorithms. Flex Logix's EFLX eFPGA allows systems to be smaller, lighter and lower power by integrating the FPGA into the application-specific integrated circuit/system-on-a-chip (ASIC/SoC) compared to the traditional method of using an external FPGA.
"We are proud to work with OpenFive and our joint customer who extensively evaluated Flex Logix's technology," said Geoff Tate, CEO of Flex Logix. "Because our eFPGA can deliver significant improvements in performance, power and reconfigurability, we are seeing more opportunities to work with a premier custom silicon solution provider such as OpenFive. Customers can benefit greatly from having RTL configurability in their ASICs."
"We're honored to have Flex Logix as an eFPGA partner, not only because their EFLX eFPGA offers density, performance and the ability to do large arrays, but also because the company has achieved many customer tape-outs in various applications including aerospace, communications ASICs and low power MCUs," said Shafy Eltoukhy, CEO of OpenFive. "Flex Logix's eFPGA offerings are also easy to integrate across most process nodes, enabling OpenFive to deliver domain-specific custom silicon solutions with differentiated IP that are optimized for power, performance and area."
The EFLX4K Logic IP core has 4K 4-input-equivalent-LUTs, 632 inputs and 632 outputs and is a complete eFPGA. The EFLX4K DSP IP core replaces about one-fourth of the LUTs with 40 multiplier-accumulators for DSP and artificial intelligence (AI) applications. The two EFLX4K cores can be tiled together to make larger arrays to support applications needing more LUTs as required, up to 7x7 with any mix of logic and DSP cores.
The EFLX arrays are programmed using VHDL or Verilog. The EFLX Compiler takes the output of a synthesis tool such as Synopsys Synplify and does packing, placement, routing, timing and bitstream generation. The bitstream, when loaded into the array, programs it to execute the desired RTL.
About Flex Logix
Flex Logix provides industry-leading solutions for making flexible chips and accelerating neural network inferencing. Its InferXÔ X1 is the industry's fastest and most-efficient AI edge inference accelerator that will bring AI to the masses in high-volume applications, surpassing competitor's performance at 1/7th size and 10x lower price. Flex Logix's eFPGA platform enables chips to be flexible to handle changing protocols, standards, algorithms, and customer needs and to implement reconfigurable accelerators that speed key workloads 30-100x compared to processors. Flex Logix is headquartered in Mountain View, California. For more information, visit https://flex-logix.com.
Related Semiconductor IP
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- eFPGA Soft IP
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Related News
- Flex Logix Co-Founder Cheng Wang Awarded Interconnect Patent For Tiling of eFPGA Cores to Create Wide Range of Larger eFPGA Arrays
- Flex Logix Validates EFLX 4K eFPGA IP Core on TSMC16FFC; Evaluation Boards Available Now
- Flex Logix Co-Founders Awarded Interconnect Patent For Connecting Any Kind Of RAM Between eFPGA Cores To Create Application-Optimized eFPGA Arrays
- Flex Logix EFLX1K eFPGA Cores Enable Array-Efficient Reconfigurable Logic on 40nm to 180nm Nodes
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