Mentor Graphics and Synopsys Donate OpenMORE Program to Virtual Socket Interface Alliance
Mentor Graphics and Synopsys Donate OpenMORE Program to Virtual Socket Interface Alliance
LAS VEGAS--(BUSINESS WIRE)--June 18, 2001-- Design Automation Conference -- Synopsys, Inc. (Nasdaq:SNPS) and Mentor Graphics Corporation (Nasdaq:MENT) today announced the donation of the Open Measure of Reuse Excellence (OpenMORE) assessment program for best design reuse practices for intellectual property (IP) to the Virtual Socket Interface Alliance (VSIA). Mentor and Synopsys will continue to participate in VSIA working groups to help develop quality guidelines and metrics, and to encourage the more than 2,500 users of the popular OpenMORE program to migrate to broader quality standards for advancing system-on-chip (SoC) development through VSIA Quality initiatives.
``The OpenMORE donation is a welcome addition to VSIA's Quality initiative,'' said Timothy O'Donnell, VSIA president and president of ARM, Inc. ``VSIA is a collaborative effort of its members, each of whom donate time, ideas and IP towards the VSIA Standards and Specifications to make reuse a reality. OpenMORE's industry wide recognition as a mature quality measure will substantially enhance VSIA's efforts to create a comprehensive, industry accepted Quality Metric. We invite the users of OpenMORE and others concerned with system-on-chip development to join us in creating a common, industry accepted Quality Metric.''
``We are happy to donate the OpenMORE program to VSIA as another step in our efforts to drive toward industry standards,'' said Walden C. Rhines, chairman of the board and CEO of Mentor Graphics. ``Through the collaborative efforts of its members, VSIA will be able to deliver a standard assessment program for IP evaluation, which represents a milestone in SoC development.''
``We are pleased that VSIA is receiving OpenMORE,'' said Aart de Geus, chairman and CEO of Synopsys, Inc. ``Many in our industry have already contributed to OpenMORE best practices by testing and providing input to the program, and its predecessor, MORE. The overwhelmingly positive response by design engineers to the Reuse Methodology Manual (RMM), on which OpenMORE is based, bodes well for continued industry collaboration in an ever widening circle.''
VSIA anticipates creating a Quality Design Working Group (DWG) with a plan to use the just-completed work of the VSIA Quality Study Group and the OpenMORE assessment program, to create the VSIA Quality Metric. To help OpenMORE users during this transition period, VSIA will provide free access to the current OpenMORE checklist on the VSIA website at www.vsi.org.
For more information on this announcement, please attend VSIA's Luncheon at the 38th Design Automation Conference (38th DAC) on June 20, 2001, from 12:00 p.m.-2:00 p.m. in Room N246 at the Las Vegas Convention Center.
About OpenMORE
OpenMORE is a practical, easy-to-use reference guide and assessment program supporting the industry's need for rapid adoption of the best design reuse practices for both hard and soft IP. OpenMORE is based on the widely used Reuse Methodology Manual (RMM) Second Edition co-authored by Synopsys and Mentor Graphics and MORE developed by Synopsys in 1998. It also includes key specifications from the Virtual Socket Interface Alliance (VSIA) deliverables documentation. In developing OpenMORE, Mentor and Synopsys engaged with IP customers, IP developers and key industry groups including: VSIA, Virtual Chip Exchange (VCX), and Design and Reuse (D&R) to ensure that OpenMORE serves the broader industry's need for a common reference score for IP reusability.
About Mentor Graphics Corporation
Mentor Graphics Corporation (Nasdaq:MENT) is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 2,850 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Ore. 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, Calif. 95131-2314. World Wide Web site: www.mentor.com.
About Synopsys, Inc.
Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View, Calif., creates leading electronic design automation (EDA) tools for the global electronics market. The company delivers advanced design technologies and solutions to developers of complex integrated circuits, electronic systems, and systems on a chip. Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers. Visit Synopsys at http://www.synopsys.com.
About VSIA
The Virtual Socket Interface Alliance (VSIA) is an open, international organization that includes representatives from all segments of the SoC industry: System houses, Semiconductor vendors, Electronic Design Automation (EDA), and Intellectual Property (IP) provider companies. VSIA's vision is to dramatically accelerate system-chip development by specifying open standards that facilitate the mix and match of virtual components from multiple sources. Many companies have adopted the use of VSIA specifications, standards and documents. VSIA has wide industry participation with more than 170 member companies from around the world. Membership is open to any company with an interest in the development and promotion of open standards used in the design of System-on-Chip. For more information, visit the VSIA Web site at www.vsi.org, or e-mail to info@vsi.org.
Note to Editors: Synopsys is a registered trademark of Synopsys, Inc. Mentor Graphics is registered trademark of Mentor Graphics Corporation. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Contact:
VSI Alliance, Inc., Los Gatos
Caroline Yeung, 408/981-8663
caroline@vsi.org
or
Mentor Graphics Corp.
Larry Toda, 503/685-1664
larry_toda@mentor.com
or
Synopsys, Inc.
Isela Gamboa, 650/584-1644
igamboa@synopsys.com
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- Altera Announces Virtual Prototyping for Its Industry-leading SoC FPGA Portfolio Through Collaboration with Mentor Graphics
- Mentor Graphics Announces New Verification IP for PCIe 4.0
- Mentor Graphics Acquires Flexras Technologies
- Mentor Graphics Wins Summary Judgment, Court Dismisses Three Synopsys Patents
Latest News
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications
- GlobalFoundries and Navitas Semiconductor Partner to Accelerate U.S. GaN Technology and Manufacturing for AI Datacenters and Critical Power Applications
- VLSI EXPERT selects Innatera Spiking Neural Processors to build industry-led neuromorphic talent pool
- SkyWater Technology and Silicon Quantum Computing Team to Advance Hybrid Quantum-Classical Computing
- Dnotitia Revolutionizes AI Storage at SC25: New VDPU Accelerator Delivers Up to 9x Performance Boost