Memory IP users evaluate Denali software

By Richard Goering
July 17, 2003 (1:25 p.m. EST)

SANTA CRUZ, Calif. — Users of Denali Software's memory intellectual property (IP) are mostly pleased with the company's products, according to postings from engineers in this week's (July 17) E-Mail Synopsys Users Group (ESNUG) mailing. Nearly all said they'd use it again, despite a handful of complaints and requests.

The user survey was prompted by an earlier exchange of ESNUG postings between Synopsys and Denali. The first salvo was fired by Synopsys' Mick Posner. “Before your readers go off and waste their time and money on Denali IP, I suggest they have a look at what they already own as part of the DesignWare library,” he wrote.

“I'm pretty sure that the ASIC designers in ESNUG are quite competent to recognize a quality memory product from yet another 'DesignWare throw-in',” responded Kevin Silver, vice president of marketing at Denali. He asserted that over 35 semiconductor companies are using Denali's Databahn DDR (double date rate) controllers in their designs, and that 17 DDR controllers are now in silicon.

ESNUG moderator John Cooley asked Silver to provide a customer list. Silver responded with 41 names. Cooley sent them all a survey, and 24 responded, prompting Cooley to state that “Kevin's claims were off by 37 to 47 percent.”

But Silver said he was pleased with the more than 50 percent response rate and the positive responses. “I'm very happy, especially with the number of customers who said they'd use us again,” he said. Even Cooley acknowledged that most of the responses were “very impressive for Denali.”

In the ESNUG 415 bulletin, the Denali users responded to a number of questions. Asked to comment on what memories they're using, respondents pointed to several memory types, including FCRAM, RLDRAM and SDRAM. Clock speeds of up to 200 MHz were fairly commonplace, and supported memory devices ranged from 128 Mbits to 1 Gbit.

Most said the Denali controllers met their performance requirements. One engineer said the controller had difficulty handling data patterns in an optimal fashion, but that Denali provided a timely update. Another said the Denali controller is “a bit too universal” and would have been more efficient without some of the unused features.

Most engineers said the controllers supported their design flows, with many noting that Denali provides synthesis scripts. One noted, however, that it took some work to port Denali's constraints into a Design Compiler synthesis flow. In physical design, most respondents reported no difficulties with layout tools from Synopsys, Avanti and Cadence. But several respondents noted that test support could be better.

Respondents said that Denali controllers met the company's gate-size estimates. They also said Denali offers good customer support. “Whenever an issue comes up (and they do, don't get me wrong) they track it down, answer to the point, resolve or explain proper usage,” said one engineer.

Users did, however, note some “surprises.” One noted “issues” with command and data FIFO documentation. Another said IP is not silicon proven. A third said it was necessary to pay detailed attention to layout planning to obtain required performance.

Several respondents said Denali memory IP offered a better solution than Synopsys' DesignWare memory IP. “We selected Denali because they are the experts,” said one. “Their Databahn solution allowed us to select exactly the right features.” Another said the Synopsys IP was “too simplistic” in its timing model and not suitable for operation above 133 MHz.

Perhaps most impressive, only one of the 24 respondents said he probably wouldn't use the Denali solution again. That respondent added that his company has “deep memory expertise” and that he would still recommend Denali to others.

Cooley said a future ESNUG bulletin would include comments from engineers who chose to stay with Synopsys' DesignWare memory IP solutions.