Lucent hybrid combines FPGA, ASIC features
![]() |
Lucent hybrid combines FPGA, ASIC features
By Craig Matsumoto, EE Times
August 18, 2000 (12:08 p.m. EST)
URL: http://www.eetimes.com/story/OEG20000818S0011
SAN MATEO, Calif. As programmable-logic vendors flesh out plans to add processors and other cores to their chips, Lucent Technologies Inc.'s Microelectronics Division is prepared to offer chips anywhere in the spectrum between FPGAs and ASICs, a flexibility that company officials say is unique. A key vehicle for these products is the ORT8850, a hybrid part that places an FPGA next to a standard-cell ASIC. The ORT8850 is one of three families of parts included in the company's new Series 4 Orca FPGAs. The idea of adding programmability to standard products or vice versa has caught on among chip vendors, who are making deals to grab the piece of technology they lack. FPGA vendors have been allying with processor makers such as ARM Ltd. and MIPS Technologies Inc.; on the other hand, LSI Logic Corp. is trying to develop FPGA cores to sprinkle into its ASICs. Many FPGA players hope to create a new breed of standard part that carries some programmability. "We were doing the same thing, while at the same time we were building all this system-level expertise in-house," said Samir Samhouri, general manager heading Lucent's FPGA and ASIC efforts. Lucent officials hope their company's arsenal of silicon cores will give it an advantage over FPGA competitors. Lucent Micro has moved its FPGA business formerly a separate business unit into the networking and communications division, along with the standard products and ASIC cores that could be combined with programmable logic. Lucent intends to use these pieces to create new parts targeted at specific networking applications in the access, metro and core areas, Samhouri said. Cores and knowledge "We have all the intellectual property that we needed, plus the system-level knowledge," he said. "It's just a matter of finding where it makes business sense to use it." Other companies' cores are important to Lucent as well. Lucent has licensed the A RM core and also hopes to use the DSP cores developed by its StarCore joint venture with Motorola Inc. in its ASICs. Within the ORT8850, Lucent is able to vary the size of the FPGA, making it any percentage of the hybrid part. The FPGA and standard-cell sections of the chip communicate across a bus that lies between them, supplemented by a second bus that curls around the FPGA portion and terminates inside the standard-cell portion. The possibility also exists for dropping small FPGAs into the ASIC half of the chip, especially as die shrinks allow more FPGA gates per square millimeter. "It's just that the right request hasn't come in yet," Samhouri said.
Related Semiconductor IP
- UCIe Chiplet PHY & Controller
- MIPI D-PHY1.2 CSI/DSI TX and RX
- Low-Power ISP
- eMMC/SD/SDIO Combo IP
- DP/eDP
Related News
- Global Unichip Corporation and Flex Logix Achieve First-Time Working Silicon on Joint ASIC Development Using EFLX Embedded FPGA (eFPGA) IP
- Aldec Launches HES-DVM Proto "Cloud Edition" - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping
- Silex Insight announces record-breaking speed for their ChaCha20-Poly1305 solution - 800Gbps (ASIC) / 100Gbps (FPGA)
- Bitech Technologies Reports Completion of Its FPGA design and the Launch of Its ASIC Initiatives for Bitcoin Mining
Latest News
- Global Semiconductor Sales Increase 17.1% Year-to-Year in February
- Altera Starts Production Shipments of Industry’s Highest Memory Bandwidth FPGA
- Blumind reimagines AI processing with breakthrough analog chip
- 32-bit RISC-V processor based on two-dimensional semiconductors
- pSemi Files Patent Infringement Lawsuit Against Cirrus Logic and Lion Semiconductor