Jennic to provide Serial RapidIO® IP in LSI Logic's RapidChip Platform ASIC Partner Program

Sheffield, UK, 27 June 2005: Jennic, a leading supplier of system-level intellectual property (IP) cores and semiconductor solutions for the communications market today announced that it is to provide its RapidIO® Interface IP product line through the LSI Logic (NYSE: LSI) RapidChip Platform ASIC Partner Program.
 
The RapidChip Platform ASIC Partner Program enables developers to reduce time-to-revenue, design risk and system costs by providing platform ASIC designers with third-party development tools including intellectual property (IP), which is a key component for delivering the value proposition of RapidChip. LSI Logic’s program gives designers access to critical IP and  offers design services and design tools for consumer, communications, storage and other markets.
 
“We share a common mission with LSI Logic to enable designer productivity and speed time-to-market, and we are pleased to be a member of the RapidChip Platform ASIC Partner Program,” said Frank Newcombe, wireline IP business development manager, Jennic. “RapidChip is a good match for use with our intellectual property because it provides a low entry cost platform and enables quick time-to-market for our customers’ ICs. This allows us to deliver a complete Serial RapidIO solution to quickly create complete system-on-chips efficiently and predictably.”
 
Jennic's RapidIO interface IP product line provides a range of complete, fully integrated RapidIO interface solutions to address a wide range of applications. Based around a common, modular architecture, the company’s solutions implement the Physical, Transport and Logical Layer RapidIO standards. A key benefit of the modular approach is that alternative implementations can be created to support emerging RapidIO standards and to address a customer's specific requirements. By considering the top-level, system-wide issues from the outset, Jennic has been able to partition the functionality in the most efficient manner possible to address issues such as reusability, silicon resource and key performance parameters such as latency and throughput.
 
To ensure seamless integration of Jennic’s Serial RapidIO IP into LSI Logic’s RapidChip Platform ASIC, Jennic has optimized its Serial RapidIO interface IP to comply with the LSI Logic RapidWorx® tool flow.
 
 “LSI Logic is pleased to welcome Jennic to the expanding RapidChip Partner IP program, enabling Serial RapidIO architecture implementations in RapidChip.” said Harmel Sangha, director of CoreWare® IP marketing, LSI Logic Corporation. “Our RapidChip Platform ASIC Partner Program is a key component of the technology ecosystem surrounding RapidChip Platform ASICs, and the addition of Jennic’s industry-leading IP is testament to the growing momentum of available IP solutions for RapidChip technology designs.”
 
"This collaboration between Jennic and LSI Logic, both members of the RapidIO Trade Association, further underscores the vitality of the RapidIO ecosystem," said Iain Scott, executive director of the RapidIO Trade Association. "Close co-operation between member companies is typical of the activities undertaken within the RapidIO Trade Association in order to deliver a multi-vendor solution to RapidIO adopters and implementers."
 
RapidChip, RapidWorx and CoreWare are trademarks of LSI Logic Corporation