Jennic announces Serial RapidIO to PCI Bridge
Sheffield, UK, 10th October 2005: Jennic, a supplier of system-level intellectual property (IP) cores and semiconductor solutions for the communications market, today announced the launch of its Serial RapidIOR to PCI Bridge.
Over the last year Jennic has established itself as the leading provider of system-level IP for Serial RapidIO interfaces. It has successfully demonstrated its IP working in a range of silicon technologies, including FPGA and structured ASIC, and has been selected by a number of ASIC vendors to provide IP for their partner programs. Responding to customer and market demand, Jennic has utilized this and its other interface IP cores to develop its first chip-level IP solution, a Serial RapidIO to PCI Bridge; other bridges in the pipeline include Serial RapidIO to PCI-Express and SPI-4.2.
"With the launch of Serial RapidIO products from the likes of Freescale, Tundra and TI, there is now a considerable demand from designers wanting to bridge from Serial RapidIO to a variety of other interface standards " said Iain Scott, executive director of the RapidIO Trade Association. "This requirement is driven from a number of angles, from customers wanting to utilize existing devices in Serial RapidIO systems currently under development, such as network processors and graphics controller chips, to those wanting to extend the capability of existing board level systems to utilize the system level capabilities of Serial RapidIO. A major driver is the growth in AdvancedTCA which supports the use of Serial RapidIO as the backplane switch fabric interconnect."
Frank Newcombe, business development manager of interconnect solutions at Jennic, said, "A significant number of our Serial RapidIO IP customers have been developing custom solutions to bridge between an existing interface standard and Serial RapidIO. As we have an intimate knowledge of Serial RapidIO and other interface standards, it makes sense for us to offer our customers a more integrated, chip level IP solution, leaving them to concentrate on the design and implementation of other areas of their products."
The Serial RapidIO to PCI Bridge appears as a bi-directional, transparent bridge between the two interfaces. By using address mapped windows, programmable translation parameters and integrated DMA controllers, data transactions between the two interfaces are handled with the minimum of host processor intervention. This allows the user to extend the functionality and performance of their existing PCI bus based systems by providing the capability to connect into a switched Serial RapidIO architecture.
Jennic will leverage its relationships with several leading semiconductor technology suppliers to provide the bridge as either an FPGA netlist , pre-programmed FPGA or an ASIC IP licence. This approach will enable Jennic to support customers undertaking prototyping and system level evaluation as well as providing a route to cost reduction and enhanced performance for when their products move into volume manufacturing.
Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related News
- Mercury Computer Systems Announces the First Available Serial RapidIO-to-PCIe Bridge IP Core
- Jennic Joins the RapidIO Trade Association
- Jennic to demonstrate Serial RapidIO IP in silicon
- Jennic validates its Serial RapidIO intellectual property in silicon
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing