Digital Core Design announces the release of a new DoCD kit v2.0 evaluation board
- Digital Core Design, the Intellectual Property (IP) provider, today has announced the release of a new - DoCD kit v2.0 evaluation board.
The DoCD kit v2.0 is a modern evaluation board with DCD on-Chip Debugger system which allows quick and effective testing HDL projects based on DCD IP cores. The Evaluation board bases on Altera's Stratix II (EP2S16) FPGA device. An environment of FPGA chip make among other:
- SRAM ( 1M x 32b ),
- FLASH ( 4M x 32b )
- DDR SDRAM ( 4 x (64M x 8b)) memories,
- I2C interface with implemented RTC ( DS1629 ) and EEPROM ( 24FC515)
- SPI interface with implemented DataFlash ( AT45DBI61BM )
- Two PS/2 sockets,
- Compact Flash socket
- UART (1Mbps),
- 1-Wire interface
- Five clocks with PLLs (software application controlled)
- Voltage, current and temperature measuring.
The evaluation board has also capability to attach an external I/O module to expand digital interfaces with USB 2.0 High Speed, Ethernet 10/100/1000, VGA DAC, CAN and RS 485.
This development board connected with DCD on-chip Debugger system makes powerful tool which makes easy way to implement, testing and debugging DCD microcontrollers into real FPGA device and significantly reduces time of designing phase
For more information please see DCD web site.
About Digital Core Design
DCD is a private Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house, an expert in IP cores architecture improvements. DCD sells its products and services directly and through its global distribution network. DCD offers VHDL and Verilog high performance and synthesizable IP cores for a speed optimized 8-, 16- and 32-bit processors, peripherals, serial interfaces, floating point arithmetic units and coprocessors. The functionality of IP solutions offered by DCD were up to date appreciated by over 200 licenses sold to over 150 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, MAXIM, RAYTHEON, OSRAM, GENERAL ELECTRIC, FARADAY, SAGEM, FLEXTRONICS and GOODRICH. DCD also became a member of first-class branch partner programs like: AMPP of ALTERA, AllianceCORE of XILINX, ispLeverCORE Connection of LATTICE and IP Catalyst of SYNOPSYS. For more information, please visit: www.dcd.pl.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
- CAN-FD Controller
Related News
- Digital Core Design Unveils DPSI5 - The Next-Generation IP Core for PSI5 Communication
- DCD-SEMI Joins MIPI Alliance and Unveils Latest I3C IP at MIPI Plugfest Warsaw 2025
- DCD-SEMI Brings Full ASIL-D Functional Safety to Entire Automotive IP Cores Portfolio
- Lattice Slashes Cost, Speeds Development of Mobile Devices With New Plug-In-&-Go USB iCEstick FPGA Evaluation Kit
Latest News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP